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Thu, 30 Nov 2023 09:36:28 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3AU9ZuMW007555 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 30 Nov 2023 09:35:56 GMT Received: from [10.253.11.15] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 30 Nov 2023 01:35:52 -0800 Message-ID: <7de9b68f-e9b4-4fe4-9670-5b4f4e2513df@quicinc.com> Date: Thu, 30 Nov 2023 17:35:49 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 08/10] phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for SM8550 Content-Language: en-US To: Manivannan Sadhasivam CC: , , , , , , , , , Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , "open list:GENERIC PHY FRAMEWORK" , open list References: <1701246516-11626-1-git-send-email-quic_cang@quicinc.com> <1701246516-11626-9-git-send-email-quic_cang@quicinc.com> <20231130071240.GG3043@thinkpad> <367744ed-a7e4-485b-b855-2cb26ef1ee16@quicinc.com> <20231130083827.GM3043@thinkpad> <20231130093423.GO3043@thinkpad> From: Can Guo In-Reply-To: <20231130093423.GO3043@thinkpad> Content-Type: text/plain; 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Thu, 30 Nov 2023 01:37:15 -0800 (PST) On 11/30/2023 5:34 PM, Manivannan Sadhasivam wrote: > On Thu, Nov 30, 2023 at 04:49:12PM +0800, Can Guo wrote: >> >> >> On 11/30/2023 4:38 PM, Manivannan Sadhasivam wrote: >>> On Thu, Nov 30, 2023 at 04:14:25PM +0800, Can Guo wrote: > > [...] > >>>>>> +static int qmp_ufs_get_gear_overlay(struct qmp_ufs *qmp, const struct qmp_phy_cfg *cfg) >>>>>> +{ >>>>>> + u32 max_gear, floor_max_gear = cfg->max_supported_gear; >>>>>> + int i = NUM_OVERLAY - 1; >>>>> >>>>> Just use i directly in the for loop. Also, please rename "i" with "idx" to make >>>>> it clear. >>>> >>>> OK >>>> >>>>> >>>>>> + int ret = -EINVAL; >>>>>> + >>>>>> + for (; i >= 0; i --) { >>>>> >>>>> i-- >>>>> >>>>>> + max_gear = cfg->tbls_hs_overlay[i].max_gear; >>>>>> + >>>>>> + if (max_gear == 0) >>>>>> + continue; >>>>> >>>>> You are setting max_gear even for targets with a single overlay. How can this >>>>> become 0? >>>> >>>> Say 8550 has two overlays, 8450 has one overlay. We are sweeping all >>>> overlays as NUM_OVERLAY == 2, so for 8450, there is one overlay initialized, >>>> another one not initialized (max_gear == 0), we are skipping the one which >>>> is not initialized. >>>> >>> >>> This is confusing at its best :) Please check for the existence of the actual >>> table instead. Like, >>> >>> for (idx = NUM_OVERLAY - 1; i >= 0, i--) { >>> >>> /* Skip if the table is not available */ >>> if (!cfg->tbls_hs_overlay[i].serdes) >>> continue; >>> >>> ... >>> } >> >> We cannot expect overlay must has its own serdes, or tx/rx/pcs, hence I am >> checking max_gear intead of any specific member. >> > > Hmm, then please add the comment as I suggested above. Sure Thanks, Can Guo. > >>> >>>>> >>>>>> + >>>>>> + /* Direct matching, bail */ >>>>>> + if (qmp->submode == max_gear) >>>>>> + return i; >>>>>> + >>>>>> + /* If no direct matching, the lowest gear is the best matching */ >>>>>> + if (max_gear < floor_max_gear) { >>>>>> + ret = i; >>>>>> + floor_max_gear = max_gear; >>>>>> + } >>>>>> + } >>>>>> + >>>>>> + return ret; >>>>>> +} >>>>>> + >>>>>> static void qmp_ufs_init_registers(struct qmp_ufs *qmp, const struct qmp_phy_cfg *cfg) >>>>>> { >>>>>> + int i; >>>>>> + bool apply_overlay = false; >>>>>> + >>>>>> + i = qmp_ufs_get_gear_overlay(qmp, cfg); >>>>>> + if (i >= 0) >>>>>> + apply_overlay = true; >>>>> >>>>> How about? >>>>> >>>>> ``` >>>>> int idx; >>>>> >>>>> idx = qmp_ufs_get_gear_overlay(qmp, cfg); >>>>> >>>>> qmp_ufs_serdes_init(qmp, &cfg->tbls); >>>>> qmp_ufs_lanes_init(qmp, &cfg->tbls); >>>>> ... >>>>> >>>>> if (idx >= 0) { >>>>> qmp_ufs_serdes_init(qmp, &cfg->tbls_hs_overlay[idx]); >>>>> qmp_ufs_lanes_init(qmp, &cfg->tbls_hs_overlay[idx]); >>>>> ... >>>>> } >>>>> ``` >>>>> >>>>> Since the ordering doesn't matter for init sequence, you can program the overlay >>>>> tables under a single condition. >>>> >>>> We can do that, but we need to be careful. When I say (in my previous reply) >>>> the ordering does not matter, that saying is from the UFS PHY HPG doc. >>>> However, in SW implementation, the 'tbls_hs_b' is actually overwriting one >>>> COM_VCO_TUNE_MAP register, the same register is also programmed by common >>>> table or overlay table. So qmp_ufs_serdes_init(qmp, &cfg->tbls_hs_b) should >>>> come after overlays. >>>> >>> >>> Then you can program tbls_hs_b after overlay tables. Wouldn't that work? >> >> I am programming tbls_hs_b after overlay tables, just a heads up in case you >> are surprised :). >> > > Cool! > > - Mani >