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Message-ID: <09ea3d40-e8f6-4cba-a576-ffeda8c02734@mailbox.org>
Date:   Thu, 30 Nov 2023 15:35:20 +0100
MIME-Version: 1.0
Subject: Re: [PATCH V11 0/7] amd-pstate preferred core
To:     Meng Li <li.meng@amd.com>,
        "Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
        Huang Rui <ray.huang@amd.com>
Cc:     linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
        x86@kernel.org, linux-acpi@vger.kernel.org,
        Shuah Khan <skhan@linuxfoundation.org>,
        linux-kselftest@vger.kernel.org,
        Nathan Fontenot <nathan.fontenot@amd.com>,
        Deepak Sharma <deepak.sharma@amd.com>,
        Alex Deucher <alexander.deucher@amd.com>,
        Mario Limonciello <mario.limonciello@amd.com>,
        Shimmer Huang <shimmer.huang@amd.com>,
        Perry Yuan <Perry.Yuan@amd.com>,
        Xiaojian Du <Xiaojian.Du@amd.com>,
        Viresh Kumar <viresh.kumar@linaro.org>,
        Borislav Petkov <bp@alien8.de>,
        Oleksandr Natalenko <oleksandr@natalenko.name>
References: <20231129065437.290183-1-li.meng@amd.com>
Content-Language: en-US
From:   Tor Vic <torvic9@mailbox.org>
In-Reply-To: <20231129065437.290183-1-li.meng@amd.com>
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On 11/29/23 07:54, Meng Li wrote:
> Hi all:
> 
> The core frequency is subjected to the process variation in semiconductors.
> Not all cores are able to reach the maximum frequency respecting the
> infrastructure limits. Consequently, AMD has redefined the concept of
> maximum frequency of a part. This means that a fraction of cores can reach
> maximum frequency. To find the best process scheduling policy for a given
> scenario, OS needs to know the core ordering informed by the platform through
> highest performance capability register of the CPPC interface.
> 
> Earlier implementations of amd-pstate preferred core only support a static
> core ranking and targeted performance. Now it has the ability to dynamically
> change the preferred core based on the workload and platform conditions and
> accounting for thermals and aging.
> 
> Amd-pstate driver utilizes the functions and data structures provided by
> the ITMT architecture to enable the scheduler to favor scheduling on cores
> which can be get a higher frequency with lower voltage.
> We call it amd-pstate preferred core.
> 
> Here sched_set_itmt_core_prio() is called to set priorities and
> sched_set_itmt_support() is called to enable ITMT feature.
> Amd-pstate driver uses the highest performance value to indicate
> the priority of CPU. The higher value has a higher priority.
> 
> Amd-pstate driver will provide an initial core ordering at boot time.
> It relies on the CPPC interface to communicate the core ranking to the
> operating system and scheduler to make sure that OS is choosing the cores
> with highest performance firstly for scheduling the process. When amd-pstate
> driver receives a message with the highest performance change, it will
> update the core ranking.
> 
> Changes from V10->V11:
> - cpufreq: amd-pstate:
> - - according Perry's commnts, I replace the string with str_enabled_disable().
> 

Hi,

Using clang-17, I get the following warning:

----
   drivers/cpufreq/amd-pstate.c:793:34: warning: variable 'cpudata' is 
uninitialized when used here [-Wuninitialized]
     793 |         if ((!amd_pstate_prefcore) || (!cpudata->hw_prefcore))
         |                                         ^~~~~~~
   drivers/cpufreq/amd-pstate.c:789:29: note: initialize the variable 
'cpudata' to silence this warning
     789 |         struct amd_cpudata *cpudata;
         |                                    ^
         |                                     = NULL
   1 warning generated.
----

Cheers,
Tor