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[2620:137:e000::3:6]) by mx.google.com with ESMTPS id v10-20020a1709029a0a00b001cc33933e45si1816885plp.42.2023.11.30.12.57.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Nov 2023 12:57:41 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) client-ip=2620:137:e000::3:6; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=bK4Dsi5x; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id 7579382A9BAD; Thu, 30 Nov 2023 12:57:38 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376730AbjK3U5Y (ORCPT + 99 others); Thu, 30 Nov 2023 15:57:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229989AbjK3U5X (ORCPT ); Thu, 30 Nov 2023 15:57:23 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A5FB510FF; Thu, 30 Nov 2023 12:57:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701377847; x=1732913847; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=nZp68kSo4khIjDFdfC/kambEYsk334VjZ7kEwMSlwtM=; b=bK4Dsi5xhh8MEok1N/SYl9mNtQaHQShYTVzbJssYy4tI/vs6HE2/GNLU 6zZxJiDAhMmJES+vl+EpQy+SWISeuwYUnrwqbOW/sjY5ZymjzbitpSA+G tDQIbRv9R+TWBGKFclAApUU7xFPyp3ojP6Exq/eGIyKdsAqgnpjzQc5Wk gASUBkSjouwkNa3I5TJx08hXT/3G+E29jXZP69eInfN+2s79AiRLif6a8 1VXf0RMhYbQxLvo+Bf1R6ZaBltBXW9MXxIquVFVqQE7QHlKhGc2r5tSBl IYFRY+YsrvF8f51HRxHbiXC3/PKZz1qRryan84GCijXXU/1Lwo2T/aVRv g==; X-IronPort-AV: E=McAfee;i="6600,9927,10910"; a="393128811" X-IronPort-AV: E=Sophos;i="6.04,239,1695711600"; d="scan'208";a="393128811" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2023 12:57:27 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.04,239,1695711600"; d="scan'208";a="17519396" Received: from agluck-desk3.sc.intel.com (HELO agluck-desk3) ([172.25.222.74]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2023 12:57:26 -0800 Date: Thu, 30 Nov 2023 12:57:25 -0800 From: Tony Luck To: Fam Zheng Cc: Fenghua Yu , Reinette Chatre , Peter Newman , Jonathan Corbet , Shuah Khan , x86@kernel.org, Shaopeng Tan , James Morse , Jamie Iles , Babu Moger , Randy Dunlap , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, patches@lists.linux.dev, Shaopeng Tan Subject: Re: [PATCH v12 7/8] x86/resctrl: Sub NUMA Cluster detection and enable Message-ID: References: <20231109230915.73600-1-tony.luck@intel.com> <20231130003418.89964-1-tony.luck@intel.com> <20231130003418.89964-8-tony.luck@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Thu, 30 Nov 2023 12:57:38 -0800 (PST) On Thu, Nov 30, 2023 at 06:02:42PM +0000, Fam Zheng wrote: > > +static __init int snc_get_config(void) > > +{ > > + unsigned long *node_caches; > > + int mem_only_nodes = 0; > > + int cpu, node, ret; > > + int num_l3_caches; > > + > > + if (!x86_match_cpu(snc_cpu_ids)) > > + return 1; > > + > > + node_caches = bitmap_zalloc(nr_node_ids, GFP_KERNEL); > > + if (!node_caches) > > + return 1; > > + > > + cpus_read_lock(); > > + > > + if (num_online_cpus() != num_present_cpus()) > > + pr_warn("Some CPUs offline, SNC detection may be incorrect\n"); > > + > > + for_each_node(node) { > > + cpu = cpumask_first(cpumask_of_node(node)); > > + if (cpu < nr_cpu_ids) > > + set_bit(get_cpu_cacheinfo_id(cpu, 3), node_caches); > > Are we sure get_cpu_cacheinfo_id() is an valid index here? Looking at > the function it could be -1 or larger than nr_node_ids. Fam, Return -1 is possible (in the case where first CPU on a node doesn't have an L3 cache). Larger than nr_node_ids seems a bit more speculative. It would mean a system with multiple L3 cache instances per node. I suppose that's theoretically possible. In the limit case every CPU may have its own personal L3 cache, but still have multiple CPUs grouped together on a node. Patch below (to be folded into part7 of next version). Increases the size of the bitmap. Checks for get_cpu_cacheinfo_id() returning -1. Patch just ignores the node in this case. I'm never quite sure how much code to add for "Can't happen" scenarios. -Tony diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index 3293ab4c58b0..85f8a1b3feaf 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -1056,12 +1056,13 @@ static __init int snc_get_config(void) unsigned long *node_caches; int mem_only_nodes = 0; int cpu, node, ret; + int cache_id; int num_l3_caches; if (!x86_match_cpu(snc_cpu_ids)) return 1; - node_caches = bitmap_zalloc(nr_node_ids, GFP_KERNEL); + node_caches = bitmap_zalloc(num_online_cpus(), GFP_KERNEL); if (!node_caches) return 1; @@ -1072,10 +1073,13 @@ static __init int snc_get_config(void) for_each_node(node) { cpu = cpumask_first(cpumask_of_node(node)); - if (cpu < nr_cpu_ids) - set_bit(get_cpu_cacheinfo_id(cpu, 3), node_caches); - else + if (cpu < nr_cpu_ids) { + cache_id = get_cpu_cacheinfo_id(cpu, 3); + if (cache_id != -1) + set_bit(cache_id, node_caches); + } else { mem_only_nodes++; + } } cpus_read_unlock(); -- 2.41.0