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Thu, 30 Nov 2023 21:25:35 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3AULPYBQ021634 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 30 Nov 2023 21:25:34 GMT Received: from [10.71.109.77] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 30 Nov 2023 13:25:33 -0800 Message-ID: <7569f43e-4446-2565-57d5-d8b43e1b4a8d@quicinc.com> Date: Thu, 30 Nov 2023 13:25:33 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [Freedreno] [PATCH] drm/msm/dpu: Correct UBWC settings for sc8280xp Content-Language: en-US To: Rob Clark , CC: Rob Clark , , Steev Klimaszewski , Danylo Piliaiev , Sean Paul , Daniel Vetter , Dmitry Baryshkov , Marijn Suijten , David Airlie , , open list References: <20231130192119.32538-1-robdclark@gmail.com> From: Abhinav Kumar In-Reply-To: <20231130192119.32538-1-robdclark@gmail.com> Content-Type: text/plain; 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Thu, 30 Nov 2023 13:25:56 -0800 (PST) On 11/30/2023 11:21 AM, Rob Clark wrote: > From: Rob Clark > > The UBWC settings need to match between the display and GPU. When we > updated the GPU settings, we forgot to make the corresponding update on > the display side. > > Reported-by: Steev Klimaszewski > Fixes: 07e6de738aa6 ("drm/msm/a690: Fix reg values for a690") > Signed-off-by: Rob Clark > --- Reviewed-by: Abhinav Kumar