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[2620:137:e000::3:1]) by mx.google.com with ESMTPS id f7-20020a17090ac28700b002850fe7e057si2748518pjt.108.2023.11.30.21.54.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Nov 2023 21:54:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) client-ip=2620:137:e000::3:1; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=BiBQsozW; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id 8FE1D8329976; Thu, 30 Nov 2023 21:54:05 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377582AbjLAFxi (ORCPT + 99 others); Fri, 1 Dec 2023 00:53:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38234 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377548AbjLAFxd (ORCPT ); Fri, 1 Dec 2023 00:53:33 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F323170C; Thu, 30 Nov 2023 21:53:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701410020; x=1732946020; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=72Q5T4Gt/E6LRMKubjDuW89gTEGgYKk1Pow/mso1yHI=; b=BiBQsozW9SdCP0I3CONN7NslERUvByyjsKmtjqQY0U7u2B+/iWQyvE4e M0kweCVy1jo8ZBQdAWh1znJChCNmGOopxcIEPN9Cy+OGn9BKGZ038XPdI 3KT2aDrCTBgAY9qmqNn44ptCeaLaj2WjpXxYo/DHJI5+gnEG7uH6XNWqx ylPdMTSXPjkb9wm9IBC+3P+vSa95oHpa8OXY7j7vzLUzh1IqMoNnrD4/A vI/W3WdoQ1l03ybeUJdiFh9GW6X8GeRceX6OJPqfFiu4V5kdmbml34NZj R01JAgIDPdGPrneyFcSEtny8nFPU1Eeutvi9IuD+xOs+GI0rh1x5X5D6y g==; X-IronPort-AV: E=McAfee;i="6600,9927,10910"; a="373624051" X-IronPort-AV: E=Sophos;i="6.04,241,1695711600"; d="scan'208";a="373624051" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2023 21:53:39 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10910"; a="763004581" X-IronPort-AV: E=Sophos;i="6.04,241,1695711600"; d="scan'208";a="763004581" Received: from ppgyli0104.png.intel.com ([10.126.160.64]) by orsmga007.jf.intel.com with ESMTP; 30 Nov 2023 21:53:33 -0800 From: Rohan G Thomas To: "David S . Miller" , Alexandre Torgue , Jose Abreu , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Giuseppe Cavallaro , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Serge Semin Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org, Rohan G Thomas , Andy Shevchenko Subject: [PATCH net-next v2 3/3] net: stmmac: Add support for EST cycle-time-extension Date: Fri, 1 Dec 2023 13:52:52 +0800 Message-Id: <20231201055252.1302-4-rohan.g.thomas@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20231201055252.1302-1-rohan.g.thomas@intel.com> References: <20231201055252.1302-1-rohan.g.thomas@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Thu, 30 Nov 2023 21:54:05 -0800 (PST) Add support for cycle-time-extension. TER GCL-register needs to be updated with the cycle-time-extension. Width of TER register is EST time interval width + 7 bits. Signed-off-by: Rohan G Thomas Reviewed-by: Andy Shevchenko --- drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c index d4ee4684bc70..287767f6d671 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c @@ -975,6 +975,8 @@ static int tc_setup_taprio(struct stmmac_priv *priv, return -EINVAL; if (!qopt->cycle_time) return -ERANGE; + if (qopt->cycle_time_extension >= BIT(wid + 7)) + return -ERANGE; if (!plat->est) { plat->est = devm_kzalloc(priv->device, sizeof(*plat->est), @@ -1041,6 +1043,8 @@ static int tc_setup_taprio(struct stmmac_priv *priv, priv->plat->est->ctr[0] = do_div(ctr, NSEC_PER_SEC); priv->plat->est->ctr[1] = (u32)ctr; + priv->plat->est->ter = qopt->cycle_time_extension; + if (fpe && !priv->dma_cap.fpesel) { mutex_unlock(&priv->plat->est->lock); return -EOPNOTSUPP; -- 2.26.2