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Date:   Fri, 1 Dec 2023 14:51:06 +0800
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Subject: Re: [PATCH v7 02/26] x86/fpu/xstate: Refine CET user xstate bit
 enabling
To:     Maxim Levitsky <mlevitsk@redhat.com>
CC:     <linux-kernel@vger.kernel.org>, <kvm@vger.kernel.org>,
        <dave.hansen@intel.com>, <pbonzini@redhat.com>,
        <seanjc@google.com>, <peterz@infradead.org>, <chao.gao@intel.com>,
        <rick.p.edgecombe@intel.com>, <john.allen@amd.com>
References: <20231124055330.138870-1-weijiang.yang@intel.com>
 <20231124055330.138870-3-weijiang.yang@intel.com>
 <c22d17ab04bf5f27409518e3e79477d579b55071.camel@redhat.com>
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From:   "Yang, Weijiang" <weijiang.yang@intel.com>
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 =?utf-8?B?S0V4em5xL0tRWTJkYXQ0eEoyV29LUERaUFNoUXA3MnVDenE4YWRKNUQyMndi?=
 =?utf-8?B?Y09Kd09kZWMycEdsWEJRUFNYK2V0bTRjc0RlSzdwU2ZsbUZOanRNamYzVFhz?=
 =?utf-8?B?UXpxVXNUNVhqUFVNVXVtOXdrSUQveWJEdDNrMm9SRWxoOWlBMnQvQjRIakNW?=
 =?utf-8?B?UTN3M1pqOERSWU9BNkxMNjFwYjE1cjVZZCtKSkYxNzIrek5DL25SNFhuZ2xN?=
 =?utf-8?B?UVgvN2N1UE9xSFJjeEhTNi9qMXVDSW5yMWtsWFlvWXhiWnJweFFVT0wxQmhH?=
 =?utf-8?B?b2dPQVlhMWV0MVpuVXllZXh5TjE3V2V3dFo3VDZaMmFuOGtzbVRKQzBuTkdx?=
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 =?utf-8?B?djJEbVVXNnVoZXBGNC84eFJmbzgvNUdEUkJUaUJYMWpydmIrMU1vRWpsNDR5?=
 =?utf-8?B?eG12a0FTcGV0Ym9uVmU1TWVuTmNPalh2MHluS3EzY2s5Z21XYXdPTkREWXd0?=
 =?utf-8?B?WURHTDUzMnptZmhsbmN6eExCVTNlRzBVMGVybUVNM0NYV01yeG4yc1pHK3Bp?=
 =?utf-8?B?UU42RzFTRnVWV0FEcUNiay95VU1VRXpFZFJXUXdJSjN2SjYrekJTaGNTVEVo?=
 =?utf-8?B?ZWFjT1JoS2trNk9IdjA1bWZ1OGZoL2JCdG9xb2NxeHpiUW5IWEo5bG4yNUFs?=
 =?utf-8?B?SjJPdFlQblErb3E0SkhpMmNzT1lzRXNuRW1xSFNKazJkR1I3NEJUSlQxNXhh?=
 =?utf-8?B?Y2ZqUWFSRDZIbEFFSlkzczNQS1dYeURFN1NXeG01a2plSkZlbWNOZlExMDhF?=
 =?utf-8?B?Ylp1bTlCTy92Z21BaHlUUEl0NXRWdFVOMDFjSDg3QnREc2F3b2xmSmlsV1Ix?=
 =?utf-8?B?UkFDQ0JobTRnQzdRZzIyU1hwUHVZYUlPR3RUSW0wMk54THRibll3Tk1ENVBw?=
 =?utf-8?B?ZE1uNm1QVnJ3aytTWWUvU0swRVVwRGl3ODZWMXZxaTBZRFU2dThtTXdqZFNG?=
 =?utf-8?B?UnMrOGxEZC9MZjA3RU51Mm8yR2thVk8wNkJNRUpRR2tCNGpnNjNvM3FpZXBx?=
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On 12/1/2023 1:26 AM, Maxim Levitsky wrote:
> On Fri, 2023-11-24 at 00:53 -0500, Yang Weijiang wrote:
>> Remove XFEATURE_CET_USER entry from dependency array as the entry doesn't
>> reflect true dependency between CET features and the user xstate bit.
>> Enable the bit in fpu_kernel_cfg.max_features when either SHSTK or IBT is
>> available.
>>
>> Both user mode shadow stack and indirect branch tracking features depend
>> on XFEATURE_CET_USER bit in XSS to automatically save/restore user mode
>> xstate registers, i.e., IA32_U_CET and IA32_PL3_SSP whenever necessary.
>>
>> Note, the issue, i.e., CPUID only enumerates IBT but no SHSTK is resulted
>> from CET KVM series which synthesizes guest CPUIDs based on userspace
>> settings,in real world the case is rare. In other words, the exitings
>> dependency check is correct when only user mode SHSTK is available.
>>
>> Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
>> Reviewed-by: Rick Edgecombe <rick.p.edgecombe@intel.com>
>> Tested-by: Rick Edgecombe <rick.p.edgecombe@intel.com>
>> ---
>>   arch/x86/kernel/fpu/xstate.c | 9 ++++++++-
>>   1 file changed, 8 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c
>> index 73f6bc00d178..6e50a4251e2b 100644
>> --- a/arch/x86/kernel/fpu/xstate.c
>> +++ b/arch/x86/kernel/fpu/xstate.c
>> @@ -73,7 +73,6 @@ static unsigned short xsave_cpuid_features[] __initdata = {
>>   	[XFEATURE_PT_UNIMPLEMENTED_SO_FAR]	= X86_FEATURE_INTEL_PT,
>>   	[XFEATURE_PKRU]				= X86_FEATURE_OSPKE,
>>   	[XFEATURE_PASID]			= X86_FEATURE_ENQCMD,
>> -	[XFEATURE_CET_USER]			= X86_FEATURE_SHSTK,
>>   	[XFEATURE_XTILE_CFG]			= X86_FEATURE_AMX_TILE,
>>   	[XFEATURE_XTILE_DATA]			= X86_FEATURE_AMX_TILE,
>>   };
>> @@ -798,6 +797,14 @@ void __init fpu__init_system_xstate(unsigned int legacy_size)
>>   			fpu_kernel_cfg.max_features &= ~BIT_ULL(i);
>>   	}
>>   
>> +	/*
>> +	 * CET user mode xstate bit has been cleared by above sanity check.
>> +	 * Now pick it up if either SHSTK or IBT is available. Either feature
>> +	 * depends on the xstate bit to save/restore user mode states.
>> +	 */
>> +	if (boot_cpu_has(X86_FEATURE_SHSTK) || boot_cpu_has(X86_FEATURE_IBT))
>> +		fpu_kernel_cfg.max_features |= BIT_ULL(XFEATURE_CET_USER);
>> +
>>   	if (!cpu_feature_enabled(X86_FEATURE_XFD))
>>   		fpu_kernel_cfg.max_features &= ~XFEATURE_MASK_USER_DYNAMIC;
>>   
> I am curious:
>
> Any reason why my review feedback was not applied even though you did agree
> that it is reasonable?

My apology! I changed the patch per you feedback but found XFEATURE_CET_USER didn't
work before sending out v7 version, after a close look at the existing code:

         for (i = 0; i < ARRAY_SIZE(xsave_cpuid_features); i++) {
                 unsigned short cid = xsave_cpuid_features[i];

                 /* Careful: X86_FEATURE_FPU is 0! */
                 if ((i != XFEATURE_FP && !cid) || !boot_cpu_has(cid))
                         fpu_kernel_cfg.max_features &= ~BIT_ULL(i);
         }

With removal of XFEATURE_CET_USER entry from xsave_cpuid_features, actually
above check will clear the bit from fpu_kernel_cfg.max_features. So now I need
to add it back conditionally.
Your sample code is more consistent with existing code in style, but I don't want to
hack into the loop and handle XFEATURE_CET_USER specifically.  Just keep the handling
and rewording the comments which is also straightforward.

>
>
> https://lore.kernel.org/lkml/c72dfaac-1622-94cf-a81d-9d7ed81b2f55@intel.com/
>
> Best regards,
> 	Maxim Levitsky
>