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Bottomley" , "open list" References: <1701407001-471-1-git-send-email-quic_cang@quicinc.com> <1701407001-471-5-git-send-email-quic_cang@quicinc.com> From: Nitin Rawat In-Reply-To: <1701407001-471-5-git-send-email-quic_cang@quicinc.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: NAltkgEwVqmUrEQrjAJSsNnA0VgCW4QL X-Proofpoint-ORIG-GUID: NAltkgEwVqmUrEQrjAJSsNnA0VgCW4QL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-01_06,2023-11-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 malwarescore=0 spamscore=0 clxscore=1011 impostorscore=0 lowpriorityscore=0 mlxscore=0 phishscore=0 suspectscore=0 bulkscore=0 priorityscore=1501 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2312010061 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Fri, 01 Dec 2023 01:22:17 -0800 (PST) On 12/1/2023 10:33 AM, Can Guo wrote: > During host driver init, the phy_gear is set to the minimum supported gear > (HS_G2). Then, during the first power mode change, the negotiated gear, say > HS-G4, is updated to the phy_gear variable so that in the second init the > updated phy_gear can be used to program the PHY. > > But the current code only allows update the phy_gear to a higher value. If > one wants to start the first init with the maximum support gear, say HS-G4, > the phy_gear is not updated to HS-G3 if the device only supports HS-G3. > > The original check added there is intend to make sure the phy_gear won't be > updated when gear is scaled down (during clock scaling). Update the check > so that one can start the first init with the maximum support gear without > breaking the original fix by checking the ufshcd_state, that is, allow > update to phy_gear only if power mode change is invoked from > ufshcd_probe_hba(). > > Reviewed-by: Manivannan Sadhasivam > Signed-off-by: Can Guo > --- > drivers/ufs/host/ufs-qcom.c | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c > index 9a90019..81056b9 100644 > --- a/drivers/ufs/host/ufs-qcom.c > +++ b/drivers/ufs/host/ufs-qcom.c > @@ -916,11 +916,12 @@ static int ufs_qcom_pwr_change_notify(struct ufs_hba *hba, > } > > /* > - * Update phy_gear only when the gears are scaled to a higher value. This is > - * because, the PHY gear settings are backwards compatible and we only need to > - * change the PHY gear settings while scaling to higher gears. > + * During UFS driver probe, always update the PHY gear to match the negotiated > + * gear, so that, if quirk UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH is enabled, > + * the second init can program the optimal PHY settings. This allows one to start > + * the first init with either the minimum or the maximum support gear. > */ > - if (dev_req_params->gear_tx > host->phy_gear) > + if (hba->ufshcd_state == UFSHCD_STATE_RESET) > host->phy_gear = dev_req_params->gear_tx; > > /* enable the device ref clock before changing to HS mode */ Reviewed-by: Nitin Rawat