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From:   "Mehta, Piyush" <piyush.mehta@amd.com>
To:     Rob Herring <robh@kernel.org>
CC:     "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
        "Simek, Michal" <michal.simek@amd.com>,
        "krzysztof.kozlowski+dt@linaro.org" 
        <krzysztof.kozlowski+dt@linaro.org>,
        "conor+dt@kernel.org" <conor+dt@kernel.org>,
        "peter.chen@kernel.org" <peter.chen@kernel.org>,
        "linus.walleij@linaro.org" <linus.walleij@linaro.org>,
        "paul@crapouillou.net" <paul@crapouillou.net>,
        "arnd@arndb.de" <arnd@arndb.de>,
        "linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "git (AMD-Xilinx)" <git@amd.com>
Subject: RE: [RFC PATCH 1/3] dt-binding: usb: ulpi-phy: add ulpi-phy binding
Thread-Topic: [RFC PATCH 1/3] dt-binding: usb: ulpi-phy: add ulpi-phy binding
Thread-Index: AQHZ8qEa5JeYHGbt0EyV+BYDViGoorA2vp2AgAC7O0CAXU0AsA==
Date:   Fri, 1 Dec 2023 13:07:41 +0000
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References: <20230929064852.16642-1-piyush.mehta@amd.com>
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 <20231002170025.GA1928031-robh@kernel.org>
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> -----Original Message-----
> From: Mehta, Piyush
> Sent: Wednesday, October 4, 2023 5:15 PM
> To: Rob Herring <robh@kernel.org>
> Cc: gregkh@linuxfoundation.org; Simek, Michal <michal.simek@amd.com>;
> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org;
> peter.chen@kernel.org; linus.walleij@linaro.org; paul@crapouillou.net;
> arnd@arndb.de; linux-usb@vger.kernel.org; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; git (AMD-Xilinx) <git@amd.com>
> Subject: RE: [RFC PATCH 1/3] dt-binding: usb: ulpi-phy: add ulpi-phy bind=
ing
>=20
> Hi All,
>=20
> > -----Original Message-----
> > From: Rob Herring <robh@kernel.org>
> > Sent: Monday, October 2, 2023 10:30 PM
> > To: Mehta, Piyush <piyush.mehta@amd.com>
> > Cc: gregkh@linuxfoundation.org; Simek, Michal <michal.simek@amd.com>;
> > krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org;
> > peter.chen@kernel.org; linus.walleij@linaro.org; paul@crapouillou.net;
> > arnd@arndb.de; linux-usb@vger.kernel.org; devicetree@vger.kernel.org;
> > linux- kernel@vger.kernel.org; git (AMD-Xilinx) <git@amd.com>
> > Subject: Re: [RFC PATCH 1/3] dt-binding: usb: ulpi-phy: add ulpi-phy
> > binding
> >
> > On Fri, Sep 29, 2023 at 12:18:50PM +0530, Piyush Mehta wrote:
> > > Create an ulpi-phy binding to read and write PHY registers with
> > > explicit control of the address and data using the usb.VIEWPORT regis=
ter.
> > >
> > > Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
> > > ---
> > > This binding patch was created to support generic platforms. This
> > > binding will be modified in accordance with patch [3/3] procedures.
> > > One of the approch may be Create a zynq phy platform driver in
> > > "driver/usb/phy" with driver source "phy-ulpi-zynq-usb.c" and then
> > > the binding will be particular to the Xilinx/AMD zynq platform.
> > >
> > > This binding was built with the Zynq hardware design example in
> > > consideration of as a generic platform. The viewport provide access
> > > the Chipidea controller to interface with the ULPI PHY.
> > > ---
> > >  .../devicetree/bindings/usb/ulpi-phy.yaml     | 48 +++++++++++++++++=
++
> > >  1 file changed, 48 insertions(+)
> > >  create mode 100644
> > > Documentation/devicetree/bindings/usb/ulpi-phy.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/usb/ulpi-phy.yaml
> > > b/Documentation/devicetree/bindings/usb/ulpi-phy.yaml
> > > new file mode 100644
> > > index 000000000000..490b2f610129
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/usb/ulpi-phy.yaml
> > > @@ -0,0 +1,48 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/usb/ulpi-phy.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: ULPI PHY- Generic platform
> > > +
> > > +maintainers:
> > > +  - Piyush Mehta <piyush.mehta@amd.com>
> > > +
> > > +properties:
> > > +  compatible:
> > > +    const: ulpi-phy
> > > +
> > > +  reg:
> > > +    maxItems: 1
> > > +
> > > +  '#phy-cells':
> > > +    const: 0
> > > +
> > > +  external-drv-vbus:
> > > +    description:
> > > +      If present, configure ulpi-phy external supply to drive 5V on =
VBus.
> > > +    type: boolean
> > > +
> > > +  view-port:
> > > +    $ref: /schemas/types.yaml#/definitions/uint32
> > > +    description:
> > > +      Address to read and write PHY registers with explicit control =
of
> > > +      the address and data using the usb.VIEWPORT register.
> > > +
> > > +required:
> > > +  - compatible
> > > +  - reg
> > > +  - view-port
> > > +
> > > +additionalProperties: false
> > > +
> > > +examples:
> > > +  - |
> > > +    phy0@e0002000 {
> > > +        compatible =3D "ulpi-phy";
> > > +        #phy-cells =3D <0x00>;
> > > +        reg =3D <0xe0002000 0x1000>;
> > > +        view-port =3D <0x170>;
> >
> > I don't understand. Do you have an MMIO address and the VIEWPORT
> > address to the PHY? You need both?
>=20
> Yes, we need both.
>=20
> The ULPI Link wrapper passes-through packet data and interprets Rx
> commands as well as send Tx commands and provide viewport services to the
> software. The ULPI link wrapper interfaces between the port controller (a=
 bus
> similar to UTMI+ that connects to the rest of the controller and its regi=
sters)
> and the ULPI interface.
>=20
> Name XUSBPS_ULPIVIEW_OFFSET
> Address 0x00000170
>=20
> Description ULPI Viewport
>=20
> The register provides indirect access to the ULPI PHY register set. Altho=
ugh the
> core performs access to the ULPI PHY register set, there may be extraordi=
nary
> circumstances where software may need direct access.
>=20
> ULPI PHY Viewport
> The ULPI viewport provides a mechanism for software to read and write PHY
> registers with explicit control of the address and data using the usb.VIE=
WPORT
> register. An interrupt is generated when a transaction is complete, inclu=
ding
> when the requested read data is available.
>=20
> >
> > There's already a defined binding for ULPI bus:
> >
> > Documentation/devicetree/bindings/usb/ulpi.txt
> >
> > Why can't you use/expand that?
> >
> > Rob
>=20
> We need your input to determine the best approach . We did preliminary
> research and discovered few possibilities:
>=20
> USB Node {
> 	.............
> 	ULPI PHY Node {  // child node
> 		.................
> 		compatible =3D "ulpi-phy-";
> 		#phy-cells =3D <0x00>;
> 		..............
> 	};
> };
>=20
> https://github.com/torvalds/linux/blob/master/Documentation/devicetree/b
> indings/phy/qcom%2Cusb-hs-phy.yaml#L100
> https://github.com/torvalds/linux/blob/master/Documentation/devicetree/b
> indings/usb/ci-hdrc-usb2.yaml#L338
> https://github.com/torvalds/linux/blob/master/drivers/usb/chipidea/ci_hdr=
c
> _msm.c#L245
> https://github.com/torvalds/linux/blob/master/drivers/phy/qualcomm/phy-
> qcom-usb-hs.c#L85
> [This implementation is based on ulpi driver:
> https://github.com/torvalds/linux/blob/master/drivers/phy/qualcomm/phy-
> qcom-usb-hs.c#L287C1-L287C19]
>=20
> OR
>=20
> https://github.com/torvalds/linux/blob/master/drivers/usb/chipidea/ci_hdr=
c
> _imx.c#L81
> https://github.com/torvalds/linux/blob/master/drivers/usb/chipidea/ci_hdr=
c
> _imx.c#L176
> https://github.com/torvalds/linux/blob/master/drivers/usb/chipidea/usbmis
> c_imx.c#L234
> https://github.com/torvalds/linux/blob/master/drivers/usb/phy/phy-mxs-
> usb.c#L191
> [This implementation is based on platform driver:
> https://github.com/torvalds/linux/blob/master/drivers/usb/phy/phy-mxs-
> usb.c#L848]
>=20
> Note:
> Above examples are to show the interface between the Chipidea Controller
> and PHY.
>=20
> Are these possibilities aligning with your inputs?
>=20
Please share your inputs on the above alternate design approaches.

> Regards,
> Piyush Mehta

BR,
PM