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Message-ID: <93419ba3-851c-48ab-828d-0d68b2cf45d4@quicinc.com>
Date:   Fri, 1 Dec 2023 19:10:40 +0530
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Subject: Re: [PATCH] arm64: dts: qcom: ipq5018: add few more reserved memory
 regions
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To:     Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Konrad Dybcio <konrad.dybcio@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>
CC:     <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>
References: <20231025-ipq5018-misc-v1-1-7d14fde97fe7@quicinc.com>
From:   Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
In-Reply-To: <20231025-ipq5018-misc-v1-1-7d14fde97fe7@quicinc.com>
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On 10/25/2023 10:12 PM, Kathiravan Thirumoorthy wrote:
> Like all other IPQ SoCs, bootloader will collect the system RAM contents
> upon crash for the post morterm analysis. If we don't reserve the memory
> region used by bootloader, obviously linux will consume it and upon next
> boot on crash, bootloader will be loaded in the same region, which will
> lead to loose some of the data, sometimes we may miss out critical
> information. So lets reserve the region used by the bootloader.
> 
> Similarly SBL copies some data into the reserved region and it will be
> used in the crash scenario. So reserve 1MB for SBL as well.
> 
> While at it, enable the SMEM support along with TCSR mutex.


Gentle Reminder...

> 
> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
> ---
>   arch/arm64/boot/dts/qcom/ipq5018.dtsi | 24 ++++++++++++++++++++++++
>   1 file changed, 24 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> index 0b739077ed70..6fbdac7a73f5 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> @@ -82,6 +82,24 @@ reserved-memory {
>   		#size-cells = <2>;
>   		ranges;
>   
> +		bootloader@4a800000 {
> +			reg = <0x0 0x4a800000 0x0 0x200000>;
> +			no-map;
> +		};
> +
> +		sbl@4aa00000 {
> +			reg = <0x0 0x4aa00000 0x0 0x100000>;
> +			no-map;
> +		};
> +
> +		smem@4ab00000 {
> +			compatible = "qcom,smem";
> +			reg = <0x0 0x4ab00000 0x0 0x100000>;
> +			no-map;
> +
> +			hwlocks = <&tcsr_mutex 3>;
> +		};
> +
>   		tz_region: tz@4ac00000 {
>   			reg = <0x0 0x4ac00000 0x0 0x200000>;
>   			no-map;
> @@ -142,6 +160,12 @@ gcc: clock-controller@1800000 {
>   			#power-domain-cells = <1>;
>   		};
>   
> +		tcsr_mutex: hwlock@1905000 {
> +			compatible = "qcom,tcsr-mutex";
> +			reg = <0x01905000 0x20000>;
> +			#hwlock-cells = <1>;
> +		};
> +
>   		sdhc_1: mmc@7804000 {
>   			compatible = "qcom,ipq5018-sdhci", "qcom,sdhci-msm-v5";
>   			reg = <0x7804000 0x1000>;
> 
> ---
> base-commit: fe1998aa935b44ef873193c0772c43bce74f17dc
> change-id: 20231025-ipq5018-misc-414b32eed881
> 
> Best regards,