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Subject: Re: [RFC 06/33] KVM: x86: hyper-v: Introduce VTL awareness to Hyper-V's
 PV-IPIs
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Date:   Fri, 1 Dec 2023 16:31:54 +0000
Message-ID: <CXD538WSGHGC.BMUQF0OJSSW4@amazon.com>
From:   Nicolas Saenz Julienne <nsaenz@amazon.com>
To:     Maxim Levitsky <mlevitsk@redhat.com>, <kvm@vger.kernel.org>
CC:     <linux-kernel@vger.kernel.org>, <linux-hyperv@vger.kernel.org>,
        <pbonzini@redhat.com>, <seanjc@google.com>, <vkuznets@redhat.com>,
        <anelkz@amazon.com>, <graf@amazon.com>, <dwmw@amazon.co.uk>,
        <jgowans@amazon.com>, <corbert@lwn.net>, <kys@microsoft.com>,
        <haiyangz@microsoft.com>, <decui@microsoft.com>, <x86@kernel.org>,
        <linux-doc@vger.kernel.org>
References: <20231108111806.92604-1-nsaenz@amazon.com>
 <20231108111806.92604-7-nsaenz@amazon.com>
 <9249b4b84f7b84da2ea21fbbbabf35f22e5d9f2f.camel@redhat.com>
In-Reply-To: <9249b4b84f7b84da2ea21fbbbabf35f22e5d9f2f.camel@redhat.com>
Precedence: bulk

On Tue Nov 28, 2023 at 7:14 AM UTC, Maxim Levitsky wrote:
> On Wed, 2023-11-08 at 11:17 +0000, Nicolas Saenz Julienne wrote:
> > HVCALL_SEND_IPI and HVCALL_SEND_IPI_EX allow targeting specific a
> > specific VTL. Honour the requests.
> >
> > Signed-off-by: Nicolas Saenz Julienne <nsaenz@amazon.com>
> > ---
> >  arch/x86/kvm/hyperv.c             | 24 +++++++++++++++++-------
> >  arch/x86/kvm/trace.h              | 20 ++++++++++++--------
> >  include/asm-generic/hyperv-tlfs.h |  6 ++++--
> >  3 files changed, 33 insertions(+), 17 deletions(-)
> >
> > diff --git a/arch/x86/kvm/hyperv.c b/arch/x86/kvm/hyperv.c
> > index d4b1b53ea63d..2cf430f6ddd8 100644
> > --- a/arch/x86/kvm/hyperv.c
> > +++ b/arch/x86/kvm/hyperv.c
> > @@ -2230,7 +2230,7 @@ static u64 kvm_hv_flush_tlb(struct kvm_vcpu *vcpu=
, struct kvm_hv_hcall *hc)
> >  }
> >
> >  static void kvm_hv_send_ipi_to_many(struct kvm *kvm, u32 vector,
> > -                                 u64 *sparse_banks, u64 valid_bank_mas=
k)
> > +                                 u64 *sparse_banks, u64 valid_bank_mas=
k, int vtl)
> >  {
> >       struct kvm_lapic_irq irq =3D {
> >               .delivery_mode =3D APIC_DM_FIXED,
> > @@ -2245,6 +2245,9 @@ static void kvm_hv_send_ipi_to_many(struct kvm *k=
vm, u32 vector,
> >                                           valid_bank_mask, sparse_banks=
))
> >                       continue;
> >
> > +             if (kvm_hv_get_active_vtl(vcpu) !=3D vtl)
> > +                     continue;
>
> Do I understand correctly that this is a temporary limitation?
> In other words, can a vCPU running in VTL1 send an IPI to a vCPU running =
VTL0,
> forcing the target vCPU to do async switch to VTL1?
> I think that this is possible.


The diff is missing some context. See this simplified implementation
(when all_cpus is set in the parent function):

static void kvm_hv_send_ipi_to_many(struct kvm *kvm, u32 vector, int vtl)
{
	[...]
	kvm_for_each_vcpu(i, vcpu, kvm) {
		if (kvm_hv_get_active_vtl(vcpu) !=3D vtl)
			continue;

		kvm_apic_set_irq(vcpu, &irq, NULL);
	}
}

With the one vCPU per VTL approach, kvm_for_each_vcpu() will iterate
over *all* vCPUs regardless of their VTL. The IPI is targetted at a
specific VTL, hence the need to filter.

VTL1 -> VTL0 IPIs are supported and happen (although they are extremely
rare).

Nicolas