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Fri, 01 Dec 2023 10:26:34 -0800 (PST) Date: Fri, 1 Dec 2023 21:26:31 +0300 From: Serge Semin To: Jiaxun Yang Cc: Thomas Bogendoerfer , Arnd Bergmann , Andrew Morton , Mike Rapoport , Matthew Wilcox , Tiezhu Yang , Huacai Chen , Yinglu Yang , Alexey Malahov , Aleksandar Rikalo , Aleksandar Rikalo , Dragan Mladjenovic , Chao-ying Fu , Marc Zyngier , "linux-mips@vger.kernel.org" , linux-mm@kvack.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/7] mips: dmi: Fix early remap on MIPS32 Message-ID: <7lla5haj4r4thqqhqvkzvcu2g5oaquubgp6zyemn4up3acoeev@saxalnh6vudt> References: <3iksuovvsln3cw3xpmjd7f7xixfvwaneu4ok56fnookvyolpco@wrxxew3thgnq> <3pgnihbrp5orh4tmj45fipbfoxdwzjh6uefitdpcea2vgkarcm@d56gv3areswl> <2148a67f-bd4f-432e-aa0d-c914a4bd5e0d@app.fastmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Fri, 01 Dec 2023 10:26:46 -0800 (PST) On Fri, Dec 01, 2023 at 03:10:13PM +0000, Jiaxun Yang wrote: > > > 在2023年12月1日十二月 下午2:54,Serge Semin写道: > > On Fri, Dec 01, 2023 at 12:13:22AM +0000, Jiaxun Yang wrote: > >> > >> > >> 在2023年11月30日十一月 下午7:16,Serge Semin写道: > >> > On Tue, Nov 28, 2023 at 03:46:37PM +0000, Jiaxun Yang wrote: > >> [...] > >> > > >> >> I'd say the safest option is to use CKSEG0 or TO_CAC here, > >> > > >> > I would have agreed with you if MIPS didn't have that special > >> > _page_cachable_default variable which is undefined for some platforms > >> > and which might be re-defined during the boot-up process, and if > >> > MIPS64 didn't have ioremap_prot() always mapping to the uncached > >> > region. But IMO updating ioremap_prot() currently seems more risky > >> > than just converting dmi_early_remap() to the uncached version > >> > especially seeing it won't change anything. MIPS64 always have IO > >> > remapped to the uncached region. MIPS32 won't be able to have cached > >> > mapping until VM is available, and paging and slabs are initialized. > >> > So on the early MIPS32 bootup stages ioremap_cache() wouldn't have > >> > worked anyway. > >> > > > >> I really didn't get that, using CKSEG0 on 32bit system and TO_CAC > >> on 64bit system won't hurt. > >> > >> Something like: > >> #ifdef CONFIG_64BIT > >> #define dmi_remap(x, l) (void *)TO_CAC(x) > >> #else > >> #define dmi_remap(x, l) (void *)CKSEG0(x) > >> #endif > >> > >> Can help us avoid all the hassle. Since it always ensures we are > >> using same CCA to access DMI tables. We can always trust Config.K0 > >> left by firmware in this case. > > > > Please note my only concern is about dmi_early_remap(), not > > dmi_remap(). The later one can be safely left backended by the > > ioremap_cache() method because at the stage it's utilized MIPS32 > > version of ioremap_prot() will be able to create any mapping it's > > requested to. The dmi_early_remap() function is called very early with > > no paging or VM or even cache stuff initialized. So currently AFAICS > > it just doesn't work on _all_ _MIPS32_ platform, because > > ioremap_prot() relies on VM and slab being available to have any > > cacheable mapping, which aren't at the moment of the dmi_setup() > > function invocation. Seeing the ioremap_cache() is just a stub on > > MIPS64 which always performs the uncached mapping, it will be > > completely safe to just convert dmi_early_remap() to ioremap() with > > no risk to beak anything. dmi_early_remap() semantics won't be > > actually changed, it will work as before on MIPS64 and will be fixed > > on MIPS32. This (AFAICS) is a completely safe fix of the problem with > > just a few affected platforms around. > > > > The only platform enabled DMI in upstream kernel is Loongson64, which > I'm perfectly sure that the mapping for DMI tables *should* be Cached. Then it looks like it must have been broken in the first place. > It is an accident that ioremap_cache is misused here, so I'm proposing > to replace it with CKSEG0/TO_CAC. Also as per MIPS UHI spec, all the > data passed from bootloader to firmware should lay in KSEG0, I failed to find the MIPS UHI spec. The only link google freely provide is http://prplfoundation.org/wiki/MIPS_documentation but it's broken. Could you please share the doc somehow? Anyway AFAICS from the MIPS arch code it only concerns the dtb pointer passed to the kernel. Does it really mandate all the data being in KSEG0? > please > let me know if your platform is an exception here. No, it's not. U-boot is executed in kseg0 anyway. > > Using ioremap_cache at dmi_early_remap does not sound safe to me as well. > What if DMI code tried to remap something beyond KSEG range at this place? Right. I've found out that for the safety sake the generic version of the ioremap_prot() has been recently updated not to do any mapping if the slab hasn't been initialized: Link: https://lore.kernel.org/lkml/20230515090848.833045-7-bhe@redhat.com/ I'll add a similar fix to the MIPS-version of the ioremap_prop() method to make sure no early cached remapping is attempted. > > The safest option here is just bypassing ioremap framework, which does > not give you any advantage but only burden. > > I'll propose a patch later. Ok. I see. I'll resubmit my series today as is then. Should you need to have the problem fixed differently, please either re-base your patch on top of it, or add your explicit comment that you'll have a better fix so Thomas could be able to consider to postpone this patch mergein until your fix is ready. -Serge(y) > -- > - Jiaxun