Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7;
Date:   Fri, 1 Dec 2023 13:36:47 -0800
From:   Bjorn Andersson <andersson@kernel.org>
To:     Tengfei Fan <quic_tengfan@quicinc.com>
Cc:     agross@kernel.org, konrad.dybcio@linaro.org,
        linus.walleij@linaro.org, linux-arm-msm@vger.kernel.org,
        linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
        kernel@quicinc.com
Subject: Re: [PATCH v5 4/4] pinctrl: qcom: sm4450: correct incorrect address
 offset
Message-ID: <dx62durg3wmqviqdpecdqprd5wwkg4i7n5tgcab55axzssdeel@ftt35c6td2sh>
References: <20231130024046.25938-1-quic_tengfan@quicinc.com>
 <20231130024046.25938-5-quic_tengfan@quicinc.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <20231130024046.25938-5-quic_tengfan@quicinc.com>
Precedence: bulk

On Thu, Nov 30, 2023 at 10:40:46AM +0800, Tengfei Fan wrote:
> The address offset of 0x100000 is already provided in SM4450 DTSI, so
> subtract 0x100000 from the offset which used by ufs and sdc.
> 

As Konrad points out, please fix the broken patch, don't add a separate
fix in the same series.

> Suggested-by: Can Guo <quic_cang@quicinc.com>

We unfortunately don't have a way to give credit to those providing
review feedback, so omit this when fixing patch #2.

Regards,
Bjorn

> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
>  drivers/pinctrl/qcom/pinctrl-sm4450.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/pinctrl/qcom/pinctrl-sm4450.c b/drivers/pinctrl/qcom/pinctrl-sm4450.c
> index 49e2e3a7a9cb..5496f955ed2a 100644
> --- a/drivers/pinctrl/qcom/pinctrl-sm4450.c
> +++ b/drivers/pinctrl/qcom/pinctrl-sm4450.c
> @@ -936,14 +936,14 @@ static const struct msm_pingroup sm4450_groups[] = {
>  	[133] = PINGROUP(133, _, phase_flag, _, _, _, _, _, _, _),
>  	[134] = PINGROUP(134, tsense_pwm1_out, tsense_pwm2_out, _, _, _, _, _, _, _),
>  	[135] = PINGROUP(135, _, phase_flag, _, _, _, _, _, _, _),
> -	[136] = UFS_RESET(ufs_reset, 0x197000),
> -	[137] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x18c004, 0, 0),
> -	[138] = SDC_QDSD_PINGROUP(sdc1_clk, 0x18c000, 13, 6),
> -	[139] = SDC_QDSD_PINGROUP(sdc1_cmd, 0x18c000, 11, 3),
> -	[140] = SDC_QDSD_PINGROUP(sdc1_data, 0x18c000, 9, 0),
> -	[141] = SDC_QDSD_PINGROUP(sdc2_clk, 0x18f000, 14, 6),
> -	[142] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x18f000, 11, 3),
> -	[143] = SDC_QDSD_PINGROUP(sdc2_data, 0x18f000, 9, 0),
> +	[136] = UFS_RESET(ufs_reset, 0x97000),
> +	[137] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x8c004, 0, 0),
> +	[138] = SDC_QDSD_PINGROUP(sdc1_clk, 0x8c000, 13, 6),
> +	[139] = SDC_QDSD_PINGROUP(sdc1_cmd, 0x8c000, 11, 3),
> +	[140] = SDC_QDSD_PINGROUP(sdc1_data, 0x8c000, 9, 0),
> +	[141] = SDC_QDSD_PINGROUP(sdc2_clk, 0x8f000, 14, 6),
> +	[142] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x8f000, 11, 3),
> +	[143] = SDC_QDSD_PINGROUP(sdc2_data, 0x8f000, 9, 0),
>  };
>  
>  static const struct msm_gpio_wakeirq_map sm4450_pdc_map[] = {
> -- 
> 2.17.1
>