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 <20231129092759.242641-12-paul.elder@ideasonboard.com> <CAHCN7xLihh_r=zn+2EsqZvsOumeJY52DHmrkVv0+A7Grib8AhQ@mail.gmail.com>
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From:   Adam Ford <aford173@gmail.com>
Date:   Sun, 3 Dec 2023 16:15:32 -0600
Message-ID: <CAHCN7xK8prNL8HGUCGpUW0-NLWvCphjGrUz_5D2CpyPFa0vG8Q@mail.gmail.com>
Subject: Re: [PATCH v4 11/11] media: rkisp1: Add UYVY as an output format
To:     Paul Elder <paul.elder@ideasonboard.com>
Cc:     linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
        devicetree@vger.kernel.org, kieran.bingham@ideasonboard.com,
        tomi.valkeinen@ideasonboard.com, umang.jain@ideasonboard.com,
        Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
        Dafna Hirschfeld <dafna@fastmail.com>,
        Mauro Carvalho Chehab <mchehab@kernel.org>,
        Heiko Stuebner <heiko@sntech.de>,
        "moderated list:ARM/Rockchip SoC support" 
        <linux-arm-kernel@lists.infradead.org>,
        open list <linux-kernel@vger.kernel.org>,
        Fabio Estevam <festevam@gmail.com>
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On Sun, Dec 3, 2023 at 3:32=E2=80=AFPM Adam Ford <aford173@gmail.com> wrote=
:
>
> On Wed, Nov 29, 2023 at 3:29=E2=80=AFAM Paul Elder <paul.elder@ideasonboa=
rd.com> wrote:
> >
> > Add support for UYVY as an output format. The uv_swap bit in the
> > MI_XTD_FORMAT_CTRL register that is used for the NV formats does not
> > work for packed YUV formats. Thus, UYVY support is implemented via
> > byte-swapping. This method clearly does not work for implementing
> > support for YVYU and VYUY.
> >
> > Signed-off-by: Paul Elder <paul.elder@ideasonboard.com>
> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > ---
> >  .../platform/rockchip/rkisp1/rkisp1-capture.c | 41 +++++++++++++++++++
> >  1 file changed, 41 insertions(+)
>
>
> Paul,
>
> I tested this patch series from one of the older submissions and I was
> able to get it working, but I could not get the video to capture to
> work no matter what resolution or video format I tried.  Each time, I
> get the same error message:  rkisp1 32e10000.isp: start pipeline
> failed -32
>
> Do you have an example of how you configured the pipeline and how you
> invoked the video capture?

I have it working now but I had to apply the patch [1]  provided by
Tomi in order for it to work properly

Can you send another revision with his patch included in the series?

With that, you can add

Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit

Thank you.

adam
[1] - https://gitlab.com/ideasonboard/nxp/linux/-/commit/d6477fe673b1c0d05d=
12ae21d8db9a03b07e7fea

>
> thanks
>
> adam
>
> >
> > diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/=
drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> > index a352893308b6..b50b044d22af 100644
> > --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> > +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
> > @@ -97,6 +97,12 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_mp=
_fmts[] =3D {
> >                 .uv_swap =3D 0,
> >                 .write_format =3D RKISP1_MI_CTRL_MP_WRITE_YUVINT,
> >                 .mbus =3D MEDIA_BUS_FMT_YUYV8_2X8,
> > +       }, {
> > +               .fourcc =3D V4L2_PIX_FMT_UYVY,
> > +               .uv_swap =3D 0,
> > +               .yc_swap =3D 1,
> > +               .write_format =3D RKISP1_MI_CTRL_MP_WRITE_YUVINT,
> > +               .mbus =3D MEDIA_BUS_FMT_YUYV8_2X8,
> >         }, {
> >                 .fourcc =3D V4L2_PIX_FMT_YUV422P,
> >                 .uv_swap =3D 0,
> > @@ -231,6 +237,13 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_=
sp_fmts[] =3D {
> >                 .write_format =3D RKISP1_MI_CTRL_SP_WRITE_INT,
> >                 .output_format =3D RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
> >                 .mbus =3D MEDIA_BUS_FMT_YUYV8_2X8,
> > +       }, {
> > +               .fourcc =3D V4L2_PIX_FMT_UYVY,
> > +               .uv_swap =3D 0,
> > +               .yc_swap =3D 1,
> > +               .write_format =3D RKISP1_MI_CTRL_SP_WRITE_INT,
> > +               .output_format =3D RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
> > +               .mbus =3D MEDIA_BUS_FMT_YUYV8_2X8,
> >         }, {
> >                 .fourcc =3D V4L2_PIX_FMT_YUV422P,
> >                 .uv_swap =3D 0,
> > @@ -464,6 +477,20 @@ static void rkisp1_mp_config(struct rkisp1_capture=
 *cap)
> >                 rkisp1_write(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL, reg=
);
> >         }
> >
> > +       /*
> > +        * U/V swapping with the MI_XTD_FORMAT_CTRL register only works=
 for
> > +        * NV12/NV21 and NV16/NV61, so instead use byte swap to support=
 UYVY.
> > +        * YVYU and VYUY cannot be supported with this method.
> > +        */
> > +       if (rkisp1->info->features & RKISP1_FEATURE_MI_OUTPUT_ALIGN) {
> > +               reg =3D rkisp1_read(rkisp1, RKISP1_CIF_MI_OUTPUT_ALIGN_=
FORMAT);
> > +               if (cap->pix.cfg->yc_swap)
> > +                       reg |=3D RKISP1_CIF_OUTPUT_ALIGN_FORMAT_MP_BYTE=
_SWAP_BYTES;
> > +               else
> > +                       reg &=3D ~RKISP1_CIF_OUTPUT_ALIGN_FORMAT_MP_BYT=
E_SWAP_BYTES;
> > +               rkisp1_write(rkisp1, RKISP1_CIF_MI_OUTPUT_ALIGN_FORMAT,=
 reg);
> > +       }
> > +
> >         rkisp1_mi_config_ctrl(cap);
> >
> >         reg =3D rkisp1_read(rkisp1, RKISP1_CIF_MI_CTRL);
> > @@ -507,6 +534,20 @@ static void rkisp1_sp_config(struct rkisp1_capture=
 *cap)
> >                 rkisp1_write(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL, reg=
);
> >         }
> >
> > +       /*
> > +        * U/V swapping with the MI_XTD_FORMAT_CTRL register only works=
 for
> > +        * NV12/NV21 and NV16/NV61, so instead use byte swap to support=
 UYVY.
> > +        * YVYU and VYUY cannot be supported with this method.
> > +        */
> > +       if (rkisp1->info->features & RKISP1_FEATURE_MI_OUTPUT_ALIGN) {
> > +               reg =3D rkisp1_read(rkisp1, RKISP1_CIF_MI_OUTPUT_ALIGN_=
FORMAT);
> > +               if (cap->pix.cfg->yc_swap)
> > +                       reg |=3D RKISP1_CIF_OUTPUT_ALIGN_FORMAT_SP_BYTE=
_SWAP_BYTES;
> > +               else
> > +                       reg &=3D ~RKISP1_CIF_OUTPUT_ALIGN_FORMAT_SP_BYT=
E_SWAP_BYTES;
> > +               rkisp1_write(rkisp1, RKISP1_CIF_MI_OUTPUT_ALIGN_FORMAT,=
 reg);
> > +       }
> > +
> >         rkisp1_mi_config_ctrl(cap);
> >
> >         mi_ctrl =3D rkisp1_read(rkisp1, RKISP1_CIF_MI_CTRL);
> > --
> > 2.39.2
> >