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Mon, 04 Dec 2023 00:38:23 -0800 (PST) Message-ID: Date: Mon, 4 Dec 2023 10:38:20 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 10/14] arm64: renesas: r9a08g045: Add Ethernet nodes Content-Language: en-US To: Geert Uytterhoeven Cc: s.shtylyov@omp.ru, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linux@armlinux.org.uk, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, linus.walleij@linaro.org, p.zabel@pengutronix.de, arnd@arndb.de, m.szyprowski@samsung.com, alexandre.torgue@foss.st.com, afd@ti.com, broonie@kernel.org, alexander.stein@ew.tq-group.com, eugen.hristev@collabora.com, sergei.shtylyov@gmail.com, prabhakar.mahadev-lad.rj@bp.renesas.com, biju.das.jz@bp.renesas.com, linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, Claudiu Beznea References: <20231120070024.4079344-1-claudiu.beznea.uj@bp.renesas.com> <20231120070024.4079344-11-claudiu.beznea.uj@bp.renesas.com> <96dd3f54-9560-4587-b4e8-bf75422ff5ef@tuxon.dev> From: claudiu beznea In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Mon, 04 Dec 2023 00:38:36 -0800 (PST) On 04.12.2023 10:02, Geert Uytterhoeven wrote: > Hi Claudiu, > > On Mon, Dec 4, 2023 at 8:41 AM claudiu beznea wrote: >> On 01.12.2023 19:35, Geert Uytterhoeven wrote: >>> On Mon, Nov 20, 2023 at 8:01 AM Claudiu wrote: >>>> From: Claudiu Beznea >>>> >>>> Add Ethernet nodes available on RZ/G3S (R9A08G045). >>>> >>>> Signed-off-by: Claudiu Beznea >>> >>> Thanks for your patch! >>> >>>> --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi >>>> +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi >>>> @@ -149,6 +149,38 @@ sdhi2: mmc@11c20000 { >>>> status = "disabled"; >>>> }; >>>> >>>> + eth0: ethernet@11c30000 { >>>> + compatible = "renesas,r9a08g045-gbeth", "renesas,rzg2l-gbeth"; >>>> + reg = <0 0x11c30000 0 0x10000>; >>>> + interrupts = , >>>> + , >>>> + ; >>>> + interrupt-names = "mux", "fil", "arp_ns"; >>>> + clocks = <&cpg CPG_MOD R9A08G045_ETH0_CLK_AXI>, >>>> + <&cpg CPG_MOD R9A08G045_ETH0_CLK_CHI>, >>>> + <&cpg CPG_MOD R9A08G045_ETH0_REFCLK>; >>>> + clock-names = "axi", "chi", "refclk"; >>>> + resets = <&cpg R9A08G045_ETH0_RST_HW_N>; >>>> + power-domains = <&cpg>; >>> >>> Perhaps add a default phy mode, like on other SoCs? >>> >>> phy-mode = "rgmii"'; >> >> I skipped this (even it was available on the other SoCs) as I consider the >> phy-mode is board specific. > > IC. Still, it's good to have some consistency across boards. > >>> Also missing: >>> >>> #address-cells = <1>; >>> #size-cells = <0>; >> >> Same for these. > > These are required, and always have the same values, so it makes more > sense to have them in the SoC .dtsi file, once. I remember I had a compilation warning with an Ethernet controller configured with fixed-link having #address-cells, #size-cells. With fixed-link these were not needed. Anyway... I'll keep all in dtsi if you prefer it this way. Thank you, Claudiu Beznea > > Gr{oetje,eeting}s, > > Geert >