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[209.85.128.44]) by smtp.gmail.com with ESMTPSA id a7-20020a1709062b0700b009fc8f309183sm5479147ejg.51.2023.12.04.08.47.00 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 04 Dec 2023 08:47:00 -0800 (PST) Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-40b367a0a12so100655e9.1 for ; Mon, 04 Dec 2023 08:47:00 -0800 (PST) X-Received: by 2002:a05:600c:257:b0:40b:4228:ee9a with SMTP id 23-20020a05600c025700b0040b4228ee9amr482510wmj.0.1701708419762; Mon, 04 Dec 2023 08:46:59 -0800 (PST) MIME-Version: 1.0 References: <20231201-x1e80100-drm-panel-edp-v2-1-b0173484631a@linaro.org> In-Reply-To: <20231201-x1e80100-drm-panel-edp-v2-1-b0173484631a@linaro.org> From: Doug Anderson Date: Mon, 4 Dec 2023 08:46:44 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2] drm/panel-edp: Add SDC ATNA45AF01 To: Abel Vesa Cc: Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Mon, 04 Dec 2023 08:47:30 -0800 (PST) Hi, On Mon, Dec 4, 2023 at 12:54=E2=80=AFAM Abel Vesa wr= ote: > > Add support for the SDC ATNA45AF01 panel. > > Signed-off-by: Abel Vesa > --- > Changes in v2: > - moved the panel entry in the proper place, as suggested by Doug > - Link to v1: https://lore.kernel.org/r/20231201-x1e80100-drm-panel-edp-v= 1-1-ef9def711d8a@linaro.org > --- > drivers/gpu/drm/panel/panel-edp.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/pa= nel-edp.c > index 825fa2a0d8a5..78565c99b54d 100644 > --- a/drivers/gpu/drm/panel/panel-edp.c > +++ b/drivers/gpu/drm/panel/panel-edp.c > @@ -1983,6 +1983,8 @@ static const struct edp_panel_entry edp_panels[] = =3D { > EDP_PANEL_ENTRY('K', 'D', 'C', 0x0809, &delay_200_500_e50, "KD116= N2930A15"), > EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "1= 16N29-30NK-C007"), > > + EDP_PANEL_ENTRY('S', 'D', 'C', 0x416d, &delay_100_500_e200, "ATNA= 45AF01"), > + Looks fine to me now. I will note that e200 is pretty long and I wonder if you've got this because of a requirement of T3+T4+T5+T6+T8 being more than 200ms. If so, I wonder if Pin-yen's patch [1] would help you optimize things? In any case, this looks fine to me. Reviewed-by: Douglas Anderson ...I'll wait a day in case you say this would be better atop Pin-yen's patch and want me to wait, but I also have no objections to landing this now and later optimizing the delays. [1] https://crrev.com/c/5052150