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Wysocki" , Subject: [PATCH] x86: intel_epb: Add earlyparam option to keep bias at performance Date: Mon, 4 Dec 2023 17:28:48 +0000 Message-ID: <20231204172849.18753-1-jalliste@amazon.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Mon, 04 Dec 2023 09:30:24 -0800 (PST) There are certain scenarios where it may be intentional that the EPB was set at to 0/ENERGY_PERF_BIAS_PERFORMANCE on kernel boot. For example, in data centers a kexec/live-update of the kernel may be performed regularly. Usually this live-update is time critical and defaulting of the bias back to ENERGY_PERF_BIAS_NORMAL may actually be detrimental to the overall update time if processors' time to ramp up/boost are affected. This patch introduces a kernel command line "intel_epb_keep_performance" which will leave the EPB at performance if during the restoration code path it is detected as such. Signed-off-by: Jack Allister Cc: Paul Durrant Cc: Jue Wang Cc: Usama Arif --- arch/x86/kernel/cpu/intel_epb.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/cpu/intel_epb.c b/arch/x86/kernel/cpu/intel_epb.c index e4c3ba91321c..0c7dd092f723 100644 --- a/arch/x86/kernel/cpu/intel_epb.c +++ b/arch/x86/kernel/cpu/intel_epb.c @@ -50,7 +50,8 @@ * the OS will do that anyway. That sometimes is problematic, as it may cause * the system battery to drain too fast, for example, so it is better to adjust * it on CPU bring-up and if the initial EPB value for a given CPU is 0, the - * kernel changes it to 6 ('normal'). + * kernel changes it to 6 ('normal'). This however is overridable via + * intel_epb_keep_performance if required. */ static DEFINE_PER_CPU(u8, saved_epb); @@ -75,6 +76,8 @@ static u8 energ_perf_values[] = { [EPB_INDEX_POWERSAVE] = ENERGY_PERF_BIAS_POWERSAVE, }; +static bool intel_epb_keep_performance __read_mostly; + static int intel_epb_save(void) { u64 epb; @@ -107,8 +110,12 @@ static void intel_epb_restore(void) */ val = epb & EPB_MASK; if (val == ENERGY_PERF_BIAS_PERFORMANCE) { - val = energ_perf_values[EPB_INDEX_NORMAL]; - pr_warn_once("ENERGY_PERF_BIAS: Set to 'normal', was 'performance'\n"); + if (!intel_epb_keep_performance) { + val = energ_perf_values[EPB_INDEX_NORMAL]; + pr_warn_once("ENERGY_PERF_BIAS: Set to 'normal', was 'performance'\n"); + } else { + pr_warn_once("ENERGY_PERF_BIAS: Kept at 'performance', no change\n"); + } } } wrmsrl(MSR_IA32_ENERGY_PERF_BIAS, (epb & ~EPB_MASK) | val); @@ -213,6 +220,12 @@ static const struct x86_cpu_id intel_epb_normal[] = { {} }; +static __init int intel_epb_keep_performance_setup(char *str) +{ + return kstrtobool(str, &intel_epb_keep_performance); +} +early_param("intel_epb_keep_performance", intel_epb_keep_performance_setup); + static __init int intel_epb_init(void) { const struct x86_cpu_id *id = x86_match_cpu(intel_epb_normal); -- 2.40.1