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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id b16-20020a9d5d10000000b006ce2fce83cbsm1956563oti.25.2023.12.04.09.35.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Dec 2023 09:35:17 -0800 (PST) From: David Lechner To: linux-spi@vger.kernel.org Cc: David Lechner , Mark Brown , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , linux-kernel@vger.kernel.org Subject: [PATCH 7/9] spi: axi-spi-engine: restore clkdiv at end of message Date: Mon, 4 Dec 2023 11:33:33 -0600 Message-ID: <20231204-axi-spi-engine-series-2-v1-7-063672323fce@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231204-axi-spi-engine-series-2-v1-0-063672323fce@baylibre.com> References: <20231204-axi-spi-engine-series-2-v1-0-063672323fce@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.4 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Mon, 04 Dec 2023 09:36:11 -0800 (PST) This modifies the ADI AXI SPI Engine driver to restore the clkdiv configuration register at the end of a SPI message. Having the clkdiv in a known state is needed to be able to add a new command in the future that only performs a delay without any SPI transfers. Furthermore having that state be the smallest possible divider will allow these delays to have the highest possible precision. Changing the initial value of clk_div from -1 to 1 is now possible because we know the function will always be called with a known clkdiv config register state. Making this change will also have the effect of not emitting a clkdiv configuration register instruction in cases where the maximum sclk rate is used. Having one less instruction to process reduces delays on the bus which will be beneficial when we implement offload support to enable reading data from devices at very high rates. Signed-off-by: David Lechner --- drivers/spi/spi-axi-spi-engine.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-axi-spi-engine.c b/drivers/spi/spi-axi-spi-engine.c index 3437829ef8b1..3798f96da586 100644 --- a/drivers/spi/spi-axi-spi-engine.c +++ b/drivers/spi/spi-axi-spi-engine.c @@ -228,7 +228,7 @@ static void spi_engine_compile_message(struct spi_message *msg, bool dry, bool keep_cs = false; u8 bits_per_word = 0; - clk_div = -1; + clk_div = 1; spi_engine_program_add_cmd(p, dry, SPI_ENGINE_CMD_WRITE(SPI_ENGINE_CMD_REG_CONFIG, @@ -280,6 +280,14 @@ static void spi_engine_compile_message(struct spi_message *msg, bool dry, if (!keep_cs) spi_engine_gen_cs(p, dry, spi, false); + + /* + * Restore clockdiv to default so that future gen_sleep commands don't + * have to be aware of the current register state. + */ + if (clk_div != 1) + spi_engine_program_add_cmd(p, dry, + SPI_ENGINE_CMD_WRITE(SPI_ENGINE_CMD_REG_CLK_DIV, 0)); } static void spi_engine_xfer_next(struct spi_message *msg, -- 2.43.0