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[23.128.96.31]) by mx.google.com with ESMTPS id bd9-20020a056a00278900b006bd360e70edsi8242561pfb.103.2023.12.04.09.45.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Dec 2023 09:45:10 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) client-ip=23.128.96.31; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=PHwvf54E; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id B0BFE807CB61; Mon, 4 Dec 2023 09:45:05 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230111AbjLDRot (ORCPT + 99 others); Mon, 4 Dec 2023 12:44:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229498AbjLDRos (ORCPT ); Mon, 4 Dec 2023 12:44:48 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 503C3D3 for ; Mon, 4 Dec 2023 09:44:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701711895; x=1733247895; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=1kEtLFKbEEFPYRmc7LlVw6EZft6vFWMya5YCHNsoAJ0=; b=PHwvf54EDu/ZKt9MzRa/dYV49AhGNwWt+Mjq6LA3gXgeRFf/UcZcmBgN +gHb7Cxf7QceW015nwopLjBytElkbiy55Hty6LiDJg4LAenW/cAGV3F5+ VXHYizeooaFDet/XnR/UJJtkELJnmI6YF6LfggSDbw+LKIQLBNHLTnVfj dpye6McA21wlGYf4DJdotLlW+qEUEkCNjmdifERVHM5yG54aFPDY4e6YU YqLvDHJVrpduLinkoW/6bpXvzgS7Y84gCl00zMSM96C15fx69n1qA0hbz TR3YpGvgOSnHjS2HJCU5AC43YFOeV/pMZOVNtTwsyjayO0430k90SNRPm A==; X-IronPort-AV: E=McAfee;i="6600,9927,10914"; a="373213623" X-IronPort-AV: E=Sophos;i="6.04,250,1695711600"; d="scan'208";a="373213623" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 09:44:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10914"; a="943963281" X-IronPort-AV: E=Sophos;i="6.04,250,1695711600"; d="scan'208";a="943963281" Received: from gauravs1-mobl.amr.corp.intel.com (HELO [10.209.53.199]) ([10.209.53.199]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 09:44:50 -0800 Message-ID: Date: Mon, 4 Dec 2023 09:44:49 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86: intel_epb: Add earlyparam option to keep bias at performance Content-Language: en-US To: Jack Allister , tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, rafael@kernel.org, len.brown@intel.com Cc: Paul Durrant , Jue Wang , Usama Arif , x86@kernel.org, Hans de Goede , Peter Zijlstra , "Rafael J. Wysocki" , linux-kernel@vger.kernel.org References: <20231204172849.18753-1-jalliste@amazon.com> From: Dave Hansen Autocrypt: addr=dave.hansen@intel.com; keydata= xsFNBE6HMP0BEADIMA3XYkQfF3dwHlj58Yjsc4E5y5G67cfbt8dvaUq2fx1lR0K9h1bOI6fC oAiUXvGAOxPDsB/P6UEOISPpLl5IuYsSwAeZGkdQ5g6m1xq7AlDJQZddhr/1DC/nMVa/2BoY 2UnKuZuSBu7lgOE193+7Uks3416N2hTkyKUSNkduyoZ9F5twiBhxPJwPtn/wnch6n5RsoXsb ygOEDxLEsSk/7eyFycjE+btUtAWZtx+HseyaGfqkZK0Z9bT1lsaHecmB203xShwCPT49Blxz VOab8668QpaEOdLGhtvrVYVK7x4skyT3nGWcgDCl5/Vp3TWA4K+IofwvXzX2ON/Mj7aQwf5W iC+3nWC7q0uxKwwsddJ0Nu+dpA/UORQWa1NiAftEoSpk5+nUUi0WE+5DRm0H+TXKBWMGNCFn c6+EKg5zQaa8KqymHcOrSXNPmzJuXvDQ8uj2J8XuzCZfK4uy1+YdIr0yyEMI7mdh4KX50LO1 pmowEqDh7dLShTOif/7UtQYrzYq9cPnjU2ZW4qd5Qz2joSGTG9eCXLz5PRe5SqHxv6ljk8mb ApNuY7bOXO/A7T2j5RwXIlcmssqIjBcxsRRoIbpCwWWGjkYjzYCjgsNFL6rt4OL11OUF37wL QcTl7fbCGv53KfKPdYD5hcbguLKi/aCccJK18ZwNjFhqr4MliQARAQABzUVEYXZpZCBDaHJp c3RvcGhlciBIYW5zZW4gKEludGVsIFdvcmsgQWRkcmVzcykgPGRhdmUuaGFuc2VuQGludGVs LmNvbT7CwXgEEwECACIFAlQ+9J0CGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJEGg1 lTBwyZKwLZUP/0dnbhDc229u2u6WtK1s1cSd9WsflGXGagkR6liJ4um3XCfYWDHvIdkHYC1t MNcVHFBwmQkawxsYvgO8kXT3SaFZe4ISfB4K4CL2qp4JO+nJdlFUbZI7cz/Td9z8nHjMcWYF IQuTsWOLs/LBMTs+ANumibtw6UkiGVD3dfHJAOPNApjVr+M0P/lVmTeP8w0uVcd2syiaU5jB aht9CYATn+ytFGWZnBEEQFnqcibIaOrmoBLu2b3fKJEd8Jp7NHDSIdrvrMjYynmc6sZKUqH2 I1qOevaa8jUg7wlLJAWGfIqnu85kkqrVOkbNbk4TPub7VOqA6qG5GCNEIv6ZY7HLYd/vAkVY E8Plzq/NwLAuOWxvGrOl7OPuwVeR4hBDfcrNb990MFPpjGgACzAZyjdmYoMu8j3/MAEW4P0z F5+EYJAOZ+z212y1pchNNauehORXgjrNKsZwxwKpPY9qb84E3O9KYpwfATsqOoQ6tTgr+1BR CCwP712H+E9U5HJ0iibN/CDZFVPL1bRerHziuwuQuvE0qWg0+0SChFe9oq0KAwEkVs6ZDMB2 P16MieEEQ6StQRlvy2YBv80L1TMl3T90Bo1UUn6ARXEpcbFE0/aORH/jEXcRteb+vuik5UGY 5TsyLYdPur3TXm7XDBdmmyQVJjnJKYK9AQxj95KlXLVO38lczsFNBFRjzmoBEACyAxbvUEhd GDGNg0JhDdezyTdN8C9BFsdxyTLnSH31NRiyp1QtuxvcqGZjb2trDVuCbIzRrgMZLVgo3upr MIOx1CXEgmn23Zhh0EpdVHM8IKx9Z7V0r+rrpRWFE8/wQZngKYVi49PGoZj50ZEifEJ5qn/H Nsp2+Y+bTUjDdgWMATg9DiFMyv8fvoqgNsNyrrZTnSgoLzdxr89FGHZCoSoAK8gfgFHuO54B lI8QOfPDG9WDPJ66HCodjTlBEr/Cwq6GruxS5i2Y33YVqxvFvDa1tUtl+iJ2SWKS9kCai2DR 3BwVONJEYSDQaven/EHMlY1q8Vln3lGPsS11vSUK3QcNJjmrgYxH5KsVsf6PNRj9mp8Z1kIG qjRx08+nnyStWC0gZH6NrYyS9rpqH3j+hA2WcI7De51L4Rv9pFwzp161mvtc6eC/GxaiUGuH BNAVP0PY0fqvIC68p3rLIAW3f97uv4ce2RSQ7LbsPsimOeCo/5vgS6YQsj83E+AipPr09Caj 0hloj+hFoqiticNpmsxdWKoOsV0PftcQvBCCYuhKbZV9s5hjt9qn8CE86A5g5KqDf83Fxqm/ vXKgHNFHE5zgXGZnrmaf6resQzbvJHO0Fb0CcIohzrpPaL3YepcLDoCCgElGMGQjdCcSQ+Ci FCRl0Bvyj1YZUql+ZkptgGjikQARAQABwsFfBBgBAgAJBQJUY85qAhsMAAoJEGg1lTBwyZKw l4IQAIKHs/9po4spZDFyfDjunimEhVHqlUt7ggR1Hsl/tkvTSze8pI1P6dGp2XW6AnH1iayn yRcoyT0ZJ+Zmm4xAH1zqKjWplzqdb/dO28qk0bPso8+1oPO8oDhLm1+tY+cOvufXkBTm+whm +AyNTjaCRt6aSMnA/QHVGSJ8grrTJCoACVNhnXg/R0g90g8iV8Q+IBZyDkG0tBThaDdw1B2l asInUTeb9EiVfL/Zjdg5VWiF9LL7iS+9hTeVdR09vThQ/DhVbCNxVk+DtyBHsjOKifrVsYep WpRGBIAu3bK8eXtyvrw1igWTNs2wazJ71+0z2jMzbclKAyRHKU9JdN6Hkkgr2nPb561yjcB8 sIq1pFXKyO+nKy6SZYxOvHxCcjk2fkw6UmPU6/j/nQlj2lfOAgNVKuDLothIxzi8pndB8Jju KktE5HJqUUMXePkAYIxEQ0mMc8Po7tuXdejgPMwgP7x65xtfEqI0RuzbUioFltsp1jUaRwQZ MTsCeQDdjpgHsj+P2ZDeEKCbma4m6Ez/YWs4+zDm1X8uZDkZcfQlD9NldbKDJEXLIjYWo1PH hYepSffIWPyvBMBTW2W5FRjJ4vLRrJSUoEfJuPQ3vW9Y73foyo/qFoURHO48AinGPZ7PC7TF vUaNOTjKedrqHkaOcqB185ahG2had0xnFsDPlx5y In-Reply-To: <20231204172849.18753-1-jalliste@amazon.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Mon, 04 Dec 2023 09:45:05 -0800 (PST) On 12/4/23 09:28, Jack Allister wrote: > There are certain scenarios where it may be intentional that the EPB was > set at to 0/ENERGY_PERF_BIAS_PERFORMANCE on kernel boot. For example, in > data centers a kexec/live-update of the kernel may be performed regularly. > > Usually this live-update is time critical and defaulting of the bias back > to ENERGY_PERF_BIAS_NORMAL may actually be detrimental to the overall > update time if processors' time to ramp up/boost are affected. > > This patch introduces a kernel command line "intel_epb_keep_performance" > which will leave the EPB at performance if during the restoration code path > it is detected as such. Folks, while I appreciate the effort to upstream thing that you have kept out of tree up until now, I don't think this is the right way. In general new kernel command-line options are a last resort. > diff --git a/arch/x86/kernel/cpu/intel_epb.c b/arch/x86/kernel/cpu/intel_epb.c > index e4c3ba91321c..0c7dd092f723 100644 > --- a/arch/x86/kernel/cpu/intel_epb.c > +++ b/arch/x86/kernel/cpu/intel_epb.c > @@ -50,7 +50,8 @@ > * the OS will do that anyway. That sometimes is problematic, as it may cause > * the system battery to drain too fast, for example, so it is better to adjust > * it on CPU bring-up and if the initial EPB value for a given CPU is 0, the > - * kernel changes it to 6 ('normal'). > + * kernel changes it to 6 ('normal'). This however is overridable via > + * intel_epb_keep_performance if required. > */ > > static DEFINE_PER_CPU(u8, saved_epb); > @@ -75,6 +76,8 @@ static u8 energ_perf_values[] = { > [EPB_INDEX_POWERSAVE] = ENERGY_PERF_BIAS_POWERSAVE, > }; > > +static bool intel_epb_keep_performance __read_mostly; > + > static int intel_epb_save(void) > { > u64 epb; > @@ -107,8 +110,12 @@ static void intel_epb_restore(void) > */ > val = epb & EPB_MASK; > if (val == ENERGY_PERF_BIAS_PERFORMANCE) { > - val = energ_perf_values[EPB_INDEX_NORMAL]; > - pr_warn_once("ENERGY_PERF_BIAS: Set to 'normal', was 'performance'\n"); > + if (!intel_epb_keep_performance) { > + val = energ_perf_values[EPB_INDEX_NORMAL]; > + pr_warn_once("ENERGY_PERF_BIAS: Set to 'normal', was 'performance'\n"); > + } else { > + pr_warn_once("ENERGY_PERF_BIAS: Kept at 'performance', no change\n"); > + } > } This is fundamentally a hack. It sounds like you want the system default to be at ENERGY_PERF_BIAS_PERFORMANCE. You also mentioned that this was done "on kernel boot". How did you do that, exactly? Shouldn't that "on kernel boot" action be reflected over here rather than introducing another command-line parameter?