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Mon, 04 Dec 2023 23:51:13 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3B4NpCb2018847 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 4 Dec 2023 23:51:12 GMT Received: from [10.110.122.69] (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 4 Dec 2023 15:51:09 -0800 Message-ID: Date: Mon, 4 Dec 2023 15:50:31 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 00/13] arm64: qcom: add and enable SHM Bridge support Content-Language: en-US To: Bartosz Golaszewski , Andy Gross , "Bjorn Andersson" , Konrad Dybcio , Elliot Berman , Krzysztof Kozlowski , Guru Das Srinagesh , Andrew Halaney , "Maximilian Luz" , Alex Elder , "Srini Kandagatla" CC: , , , , "Bartosz Golaszewski" References: <20231127141600.20929-1-brgl@bgdev.pl> From: Deepti Jaggi In-Reply-To: <20231127141600.20929-1-brgl@bgdev.pl> Content-Type: text/plain; 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Mon, 04 Dec 2023 15:52:07 -0800 (PST) On 11/27/2023 6:15 AM, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski > > This is pretty much another full rewrite of the SHM Bridge support > series. After more on- and off-list discussions I think this time it > will be close to the final thing though. > > We've established the need for using separate pools for SCM and QSEECOM > as well as the upcoming scminvoke driver. > > It's also become clear that in order to be future-proof, the new > allocator must be an abstraction layer of a higher level as the SHM > Bridge will not be the only memory protection mechanism that we'll see > upstream. Hence the rename to TrustZone Memory rather than SCM Memory > allocator. > > Also to that end: the new allocator is its own module now and provides a > Kconfig choice menu for selecting the mode of operation (currently > default and SHM Bridge). > > Due to a high divergence from v2, I dropped all tags except for > patch 1/15 which didn't change. > > Tested on sm8550 and sa8775p with the Inline Crypto Engine and > remoteproc. > > v5 -> v6: > Fixed two issues reported by autobuilders: > - add a fix for memory leaks in the qseecom driver as the first patch for > easier backporting to the v6.6.y branch > - explicitly cast the bus address stored in a variable of type dma_addr_t > to phys_addr_t expected by the genpool API > > v4 -> v5: > - fix the return value from qcom_tzmem_init() if SHM Bridge is not supported > - remove a comment that's no longer useful > - collect tags > > v3 -> v4: > - include linux/sizes.h for SZ_X macros > - use dedicated RCU APIs to dereference radix tree slots > - fix kerneldocs > - fix the comment in patch 14/15: it's the hypervisor, not the TrustZone > that creates the SHM bridge > > v2 -> v3: > - restore pool management and use separate pools for different users > - don't use the new allocator in qcom_scm_pas_init_image() as the > TrustZone will create an SHM bridge for us here > - rewrite the entire series again for most part > > v1 -> v2: > - too many changes to list, it's a complete rewrite as explained above > > Bartosz Golaszewski (13): > firmware: qcom: qseecom: fix memory leaks in error paths > firmware: qcom: add a dedicated TrustZone buffer allocator > firmware: qcom: scm: enable the TZ mem allocator > firmware: qcom: scm: smc: switch to using the SCM allocator > firmware: qcom: scm: make qcom_scm_assign_mem() use the TZ allocator > firmware: qcom: scm: make qcom_scm_ice_set_key() use the TZ allocator > firmware: qcom: scm: make qcom_scm_lmh_dcvsh() use the TZ allocator > firmware: qcom: scm: make qcom_scm_qseecom_app_get_id() use the TZ > allocator > firmware: qcom: qseecom: convert to using the TZ allocator > firmware: qcom: scm: add support for SHM bridge operations > firmware: qcom: tzmem: enable SHM Bridge support > firmware: qcom: scm: clarify the comment in qcom_scm_pas_init_image() > arm64: defconfig: enable SHM Bridge support for the TZ memory > allocator > > arch/arm64/configs/defconfig | 1 + > drivers/firmware/qcom/Kconfig | 30 ++ > drivers/firmware/qcom/Makefile | 1 + > .../firmware/qcom/qcom_qseecom_uefisecapp.c | 261 +++++-------- > drivers/firmware/qcom/qcom_scm-smc.c | 30 +- > drivers/firmware/qcom/qcom_scm.c | 179 +++++---- > drivers/firmware/qcom/qcom_scm.h | 6 + > drivers/firmware/qcom/qcom_tzmem.c | 365 ++++++++++++++++++ > drivers/firmware/qcom/qcom_tzmem.h | 13 + > include/linux/firmware/qcom/qcom_qseecom.h | 4 +- > include/linux/firmware/qcom/qcom_scm.h | 6 + > include/linux/firmware/qcom/qcom_tzmem.h | 28 ++ > 12 files changed, 669 insertions(+), 255 deletions(-) > create mode 100644 drivers/firmware/qcom/qcom_tzmem.c > create mode 100644 drivers/firmware/qcom/qcom_tzmem.h > create mode 100644 include/linux/firmware/qcom/qcom_tzmem.h > Verified the following : Shm Bridge creation Successful qcom_scm_assign_mem calls using tz allocator Tested-by: Deepti Jaggi #sa8775p-ride