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Message-ID: <3356a35c-0c50-4539-a955-01d2e67b4eca@linaro.org>
Date:   Tue, 5 Dec 2023 09:47:31 +0100
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Subject: Re: [PATCH v2 1/6] dt-bindings: interrupt-controller: Add support for
 Realtek DHC SoCs
Content-Language: en-US
To:     =?UTF-8?B?SmFtZXMgVGFpIFvmiLTlv5fls7Bd?= <james.tai@realtek.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Marc Zyngier <maz@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>
Cc:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
References: <20231117162709.1096585-1-james.tai@realtek.com>
 <20231117162709.1096585-2-james.tai@realtek.com>
 <c3a98e2c-ba62-4798-a0d0-a8bc1fe5bb6b@linaro.org>
 <7959920acf004f3cb8072de1e17439fa@realtek.com>
 <e1490203387d4c48a5f8c4040ece038a@realtek.com>
 <6250c57b-6d38-4085-9a79-58e4e5ed1e3d@linaro.org>
 <cf2f9fd124514cb9832e942e16b8fa6e@realtek.com>
 <5134d2c7-b499-400d-bec8-ae0de1eff7db@linaro.org>
 <f27cb5d8943e44b597a13d7655edf4d0@realtek.com>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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In-Reply-To: <f27cb5d8943e44b597a13d7655edf4d0@realtek.com>
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On 05/12/2023 09:43, James Tai [戴志峰] wrote:
> Hi Krzysztof,
> 
>>>>>>>> +  interrupts-extended:
>>>>>>>
>>>>>>> interrupts instead.
>>>>>>>
>>>>>>> Anyway, you must describe the items. Why this is not fixed but flexible?
>>>>>>> Hardware has different number of pins? That's unlikely.
>>>>>>>
>>>>>> I will replace it with 'interrupts'. Since our Interrupt controller
>>>>>> architecture doesn't involve multiple interrupt sources, using 'interrupts'
>>>> should suffice.
>>>>>>
>>>>>
>>>>> Due to changes in hardware design, some peripheral interrupts pin
>>>>> initially
>>>> connected to the Realtek interrupt controller were redirected to the GIC.
>>>>> However, the associated fields and statuses in the Realtek interrupt
>>>>> controller
>>>> registers were not removed.
>>>>> As a result, these interrupts cannot be cleared by peripheral
>>>>> register, and their
>>>> status clearing is still needing the Realtek interrupt controller driver to
>> manage.
>>>>>
>>>>> That's why flexibility is necessary.
>>>>
>>>> This does not explain why this is not fixed per variant.
>>>>
>>>
>>> Does the definition of "fixed" you mentioned refer to fixed interrupt pins? If
>>> not, could you please give me an example and let me know what you mean by
>>> "fixed"?
>>
>> Number of the interrupts per each device or variant should be strictly defined,
>> not variable.
> 
> Thank you for your explanation.
> 
> The DHC platforms contain two interrupt controllers, each handling peripheral device interrupts in the two power domains. 
> While each has a fixed IRQ numbers, the specific IRQ varies depending on the platform.

Srsly, what "specific IRQ" has anything to do with "number of interrupts
per each device or variant"?

Look at all other bindings covering multiple devices and their
clocks/interrupts/interconnects/reg etc.

Best regards,
Krzysztof