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bh=iYZrHcRKmIrpOYrKMr35EBcUWS2p3IpXTZ63lUIPXII=; b=rY6nmgxxV/dp2Txfm9owLYj4Xm0chzSf5QtJ9SHZhSfsxUm8HpyKu2Di1fmddShakHu/lo lxUyRPsPuOy3Ws+nldU7ljrsKFaPZp5lJXD4Gcgt7QtfPX/R6i+PiZnRdf06YrsP8183/b LGHmH3HZswyx3flQnuYHj8AcLNNjH9Q= Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 71D6B136CF; Tue, 5 Dec 2023 08:51:43 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id k77CG5/kbmXvQgAAD6G6ig (envelope-from ); Tue, 05 Dec 2023 08:51:43 +0000 Date: Tue, 5 Dec 2023 09:51:39 +0100 From: Michal Hocko To: Srinivasulu Thanneeru Cc: aneesh.kumar@linux.ibm.com, linux-cxl@vger.kernel.org, linux-mm@kvack.org, dan.j.williams@intel.com, hannes@cmpxchg.org, hasanalmaruf@fb.com, haowang3@fb.com, ying.huang@intel.com, gregory.price@memverge.com, tj@kernel.org, hezhongkun.hzk@bytedance.com, fvdl@google.com, john@jagalactic.com, emirakhur@micron.com, vtavarespetr@micron.com, Ravis.OpenSrc@micron.com, Jonathan.Cameron@huawei.com, linux-kernel@vger.kernel.org, linux-api@vger.kernel.org Subject: Re: [EXT] Re: [RFC PATCH 0/2] Node migration between memory tiers Message-ID: References: <20231130220422.2033-1-sthanneeru.opensrc@micron.com> <1db561a9-6984-418d-9305-a2a5ece93696@micron.com> <2552828e-6865-4fa8-a9c4-8ed76dd85257@micron.com> MIME-Version: 1.0 Content-Type: text/plain; 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Tue, 05 Dec 2023 00:51:54 -0800 (PST) On Tue 05-12-23 14:12:17, Srinivasulu Thanneeru wrote: > > > On 12/5/2023 2:05 PM, Michal Hocko wrote: > > CAUTION: EXTERNAL EMAIL. Do not click links or open attachments unless you recognize the sender and were expecting this message. > > > > > > On Tue 05-12-23 01:26:07, Srinivasulu Thanneeru wrote: > > > > > > > > > On 12/4/2023 9:13 PM, Michal Hocko wrote: > > > > CAUTION: EXTERNAL EMAIL. Do not click links or open attachments unless you recognize the sender and were expecting this message. > > > > > > > > > > > > On Fri 01-12-23 03:34:20, sthanneeru.opensrc@micron.com wrote: > > > > > From: Srinivasulu Thanneeru > > > > > > > > > > The memory tiers feature allows nodes with similar memory types > > > > > or performance characteristics to be grouped together in a > > > > > memory tier. However, there is currently no provision for > > > > > moving a node from one tier to another on demand. > > > > > > > > Could you expand on why this is really needed/necessary? What is the > > > > actual usecase? > > > > > > Hi Michal Hock, > > > > > > Following two use-cases we have observed. > > > 1. It is not accurate to group similar memory types in the same tier, > > > because even similar memory types may have different speed grades. > > > > Presumably they are grouped based on a HW configuration. Does that mean > > that the configuration is wrong? Are you trying to workaround that by > > this interface? > > > > > 2. Some systems boots up with CXL devices and DRAM on the same memory-tier, > > > we need a way to move the CXL nodes to the correct tier from the user space. > > > > Again, could you expand a bit more and explain why this cannot be > > configured automatically? > > Yes, in both cases above, if hardware not automatically populated properly, > in that case this interface would help to correct it from user space. > > We had observed case-2 in our setups. How hard it is to address this at the HW level? Btw. this is really important piece of context that should be part of the changelog. Quite honestly introducing user interfaces solely to workaround HW issues seems a rather weak justification. Are there any usecases you can think of where this would be useful? -- Michal Hocko SUSE Labs