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[2620:137:e000::3:4]) by mx.google.com with ESMTPS id h22-20020a63f916000000b00577475ee5f6si5066596pgi.618.2023.12.05.05.24.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Dec 2023 05:24:24 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) client-ip=2620:137:e000::3:4; Authentication-Results: mx.google.com; dkim=pass header.i=@amazon.com header.s=amazon201209 header.b=VPX0TOOt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amazon.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by howler.vger.email (Postfix) with ESMTP id 0688E822C63F; Tue, 5 Dec 2023 05:24:22 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at howler.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442146AbjLENYA (ORCPT + 99 others); Tue, 5 Dec 2023 08:24:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53822 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1376990AbjLENX7 (ORCPT ); Tue, 5 Dec 2023 08:23:59 -0500 Received: from smtp-fw-6001.amazon.com (smtp-fw-6001.amazon.com [52.95.48.154]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D76511AA for ; Tue, 5 Dec 2023 05:24:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1701782646; x=1733318646; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zngyCLs919oe0BSu6dF3WRfqoVmoP9Zc74naBRwpoKw=; b=VPX0TOOtEWtZ5MtN4XoZkfJBuSF7SFpuxGxTCi5HeeIXzeLcQQVjKBXd 4staQ+7V8dKP/HfrthauN+ZYIVRmwk1iCRDdoBhLManI4/BW8wLMOV9Aa 9o8LBfTZFTP5h1dOo/9vzRdYVAr+4obJ49xkgdRC+E5pa2zft3eivhmXC Y=; X-IronPort-AV: E=Sophos;i="6.04,252,1695686400"; d="scan'208";a="374236312" Received: from iad12-co-svc-p1-lb1-vlan2.amazon.com (HELO email-inbound-relay-pdx-2b-m6i4x-7fa2de02.us-west-2.amazon.com) ([10.43.8.2]) by smtp-border-fw-6001.iad6.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Dec 2023 13:24:03 +0000 Received: from smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev (pdx2-ws-svc-p26-lb5-vlan2.pdx.amazon.com [10.39.38.66]) by email-inbound-relay-pdx-2b-m6i4x-7fa2de02.us-west-2.amazon.com (Postfix) with ESMTPS id D440E40D7D; Tue, 5 Dec 2023 13:24:01 +0000 (UTC) Received: from EX19MTAUWA002.ant.amazon.com [10.0.21.151:25120] by smtpin.naws.us-west-2.prod.farcaster.email.amazon.dev [10.0.22.224:2525] with esmtp (Farcaster) id 8e3c481d-2cdf-4384-85b3-1ed52c5be55a; Tue, 5 Dec 2023 13:24:01 +0000 (UTC) X-Farcaster-Flow-ID: 8e3c481d-2cdf-4384-85b3-1ed52c5be55a Received: from EX19D037UWC001.ant.amazon.com (10.13.139.197) by EX19MTAUWA002.ant.amazon.com (10.250.64.202) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 5 Dec 2023 13:24:01 +0000 Received: from EX19MTAUWC001.ant.amazon.com (10.250.64.145) by EX19D037UWC001.ant.amazon.com (10.13.139.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 5 Dec 2023 13:24:00 +0000 Received: from dev-dsk-jalliste-1c-e3349c3e.eu-west-1.amazon.com (10.13.244.142) by mail-relay.amazon.com (10.250.64.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40 via Frontend Transport; Tue, 5 Dec 2023 13:23:58 +0000 From: Jack Allister To: CC: Paul Durrant , Jue Wang , Usama Arif , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , , "H. Peter Anvin" , Hans de Goede , Peter Zijlstra , "Rafael J. Wysocki" , Subject: [PATCH v3] x86: intel_epb: Add earlyparam option to keep bias at performance Date: Tue, 5 Dec 2023 13:23:54 +0000 Message-ID: <20231205132355.76306-1-jalliste@amazon.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231205131359.66338-1-jalliste@amazon.com> References: <20231205131359.66338-1-jalliste@amazon.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Tue, 05 Dec 2023 05:24:22 -0800 (PST) There are certain scenarios where it may be intentional that the EPB was set at to 0/ENERGY_PERF_BIAS_PERFORMANCE on kernel boot. For example, in data centers a kexec/live-update of the kernel may be performed regularly. Usually this live-update is time critical and defaulting of the bias back to ENERGY_PERF_BIAS_NORMAL may actually be detrimental to the overall update time if processors' time to ramp up/boost are affected. This patch introduces a kernel command line "intel_epb_no_override" which will leave the EPB at performance if during the restoration code path it is detected as such. Signed-off-by: Jack Allister Cc: Paul Durrant Cc: Jue Wang Cc: Usama Arif --- arch/x86/kernel/cpu/intel_epb.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/intel_epb.c b/arch/x86/kernel/cpu/intel_epb.c index e4c3ba91321c..cbe0e224b8d9 100644 --- a/arch/x86/kernel/cpu/intel_epb.c +++ b/arch/x86/kernel/cpu/intel_epb.c @@ -50,7 +50,8 @@ * the OS will do that anyway. That sometimes is problematic, as it may cause * the system battery to drain too fast, for example, so it is better to adjust * it on CPU bring-up and if the initial EPB value for a given CPU is 0, the - * kernel changes it to 6 ('normal'). + * kernel changes it to 6 ('normal'). This however is overridable via + * intel_epb_no_override if required. */ static DEFINE_PER_CPU(u8, saved_epb); @@ -75,6 +76,8 @@ static u8 energ_perf_values[] = { [EPB_INDEX_POWERSAVE] = ENERGY_PERF_BIAS_POWERSAVE, }; +static bool intel_epb_no_override __read_mostly; + static int intel_epb_save(void) { u64 epb; @@ -106,7 +109,7 @@ static void intel_epb_restore(void) * ('normal'). */ val = epb & EPB_MASK; - if (val == ENERGY_PERF_BIAS_PERFORMANCE) { + if (!intel_epb_no_override && val == ENERGY_PERF_BIAS_PERFORMANCE) { val = energ_perf_values[EPB_INDEX_NORMAL]; pr_warn_once("ENERGY_PERF_BIAS: Set to 'normal', was 'performance'\n"); } @@ -213,6 +216,12 @@ static const struct x86_cpu_id intel_epb_normal[] = { {} }; +static __init int intel_epb_no_override_setup(char *str) +{ + return kstrtobool(str, &intel_epb_no_override); +} +early_param("intel_epb_no_override", intel_epb_no_override_setup); + static __init int intel_epb_init(void) { const struct x86_cpu_id *id = x86_match_cpu(intel_epb_normal); -- 2.40.1 Sorry it looks like I had missed the v2 flag from the subject, also the commit message did not include the correct rename compared to v1. This should all be fixed in v3 now.