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Wed, 6 Dec 2023 11:07:59 +0000 Received: from IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::55b:c350:980:ad8]) by IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::55b:c350:980:ad8%6]) with mapi id 15.20.7046.024; Wed, 6 Dec 2023 11:07:59 +0000 From: Inochi Amaoto To: Emil Renner Berthing , Inochi Amaoto , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chao Wei , Chen Wang , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: Jisheng Zhang , qiujingbao.dlmu@gmail.com, dlan@gentoo.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v2 0/4] riscv: sophgo: add clock support for Sophgo CV1800 SoCs Date: Wed, 6 Dec 2023 19:07:55 +0800 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Content-Transfer-Encoding: 8bit Content-Type: text/plain X-TMN: [efj7rrDA26Avtp4DQcpmS5Z658Gc/7txVEtGDoKMs6M=] X-ClientProxiedBy: BY3PR04CA0011.namprd04.prod.outlook.com (2603:10b6:a03:217::16) To IA1PR20MB4953.namprd20.prod.outlook.com (2603:10b6:208:3af::19) X-Microsoft-Original-Message-ID: <20231206110755.790348-1-inochiama@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA1PR20MB4953:EE_|CH0PR20MB3868:EE_ X-MS-Office365-Filtering-Correlation-Id: 294d2484-58f6-4deb-5b9e-08dbf64b9b3c X-Microsoft-Antispam: BCL:0; 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Wed, 06 Dec 2023 03:08:15 -0800 (PST) >Inochi Amaoto wrote: >>> Inochi Amaoto wrote: >>>> Add clock controller support for the Sophgo CV1800B and CV1812H. >>>> >>>> This patch follow this patch series: >>>> https://lore.kernel.org/all/IA1PR20MB495399CAF2EEECC206ADA7ABBBD5A@IA1PR20MB4953.namprd20.prod.outlook.com/ >>>> >>>> Changed from v1: >>>> 1. fix license issues. >>>> >>>> Inochi Amaoto (4): >>>> dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC >>>> clk: sophgo: Add CV1800 series clock controller driver >>>> riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC >>>> riscv: dts: sophgo: add uart clock for Sophgo CV1800 series SoC >>> >>> Hi Inochi, >>> >>> This series seems to be missing patch 1 and 2. If you did send them, but just >>> omitted linux-riscv from those patches, please don't do that. Having the whole >>> series makes it a lot easier to review without having to hunt down all the >>> missing parts on lore.kernel.org. >>> >>> scripts/get_maintainer.pl does support muliple patches as input >>> >>> /Emil >>> >> >> Hi Emil, >> >> The get_maintainer.pl does not give me linux-riscv mail list for the first >> and second patch. I have added this to the second one, but the patch is >> held by the mail list since is too big. Anyway, I will add this mail list >> manually if you need. Sorry for this inconvenience. > >No worries. Yeah, that's what I meant by get_maintainer.pl supporting multiple >patches. You can do something like > > git format-patch .. > ./scripts/get_maintainer.pl *.patch > >..to get a list of recipients for the whole series. > >/Emil > I have known this. But I only do this for cover. Anyway, I will send this patch in the way your mentioned.