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[209.85.128.178]) by smtp.gmail.com with ESMTPSA id d17-20020a81ab51000000b005d6fb42cf39sm3801123ywk.52.2023.12.06.06.30.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 06 Dec 2023 06:30:07 -0800 (PST) Received: by mail-yw1-f178.google.com with SMTP id 00721157ae682-5d3d5b10197so61975817b3.2; Wed, 06 Dec 2023 06:30:07 -0800 (PST) X-Received: by 2002:a05:690c:706:b0:5d7:1941:acb with SMTP id bs6-20020a05690c070600b005d719410acbmr666458ywb.102.1701873007473; Wed, 06 Dec 2023 06:30:07 -0800 (PST) MIME-Version: 1.0 References: <20231201131551.201503-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20231201131551.201503-4-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: <20231201131551.201503-4-prabhakar.mahadev-lad.rj@bp.renesas.com> From: Geert Uytterhoeven Date: Wed, 6 Dec 2023 15:29:55 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 3/3] riscv: dts: renesas: r9a07g043f: Update gpio-ranges property To: Prabhakar Cc: Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Linus Walleij , linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-gpio@vger.kernel.org, Biju Das , Lad Prabhakar Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Wed, 06 Dec 2023 06:30:27 -0800 (PST) Hi Prabhakar, Thanks for your patch! On Fri, Dec 1, 2023 at 2:16 PM Prabhakar wrote: > From: Lad Prabhakar > > On RZ/Five we have additional pins compared to the RZ/G2UL SoC so update > the gpio-ranges property in RZ/Five SoC DTSI. > > Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven > --- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi > +++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi > @@ -46,6 +46,10 @@ cpu0_intc: interrupt-controller { > }; > }; > > +&pinctrl { > + gpio-ranges = <&pinctrl 0 0 232>; > +}; > + > &soc { > dma-noncoherent; > interrupt-parent = <&plic>; I believe this has a hard dependency on the pinctrl driver changes, due to the following check in in rzg2l_gpio_register(): if (of_args.args[0] != 0 || of_args.args[1] != 0 || of_args.args[2] != pctrl->data->n_port_pins) { dev_err(pctrl->dev, "gpio-ranges does not match selected SOC\n"); return -EINVAL; } Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds