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Wed, 06 Dec 2023 08:00:02 -0800 (PST) Refactors the phy handling logic in the imx6 PCI driver by adding IMX6_PCIE_FLAG_HAS_PHY bitmask define for drvdata::flags. The drvdata::flags and a bitmask ensures a cleaner and more scalable switch-case structure for handling phy. Signed-off-by: Frank Li --- drivers/pci/controller/dwc/pci-imx6.c | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 8a9b527934f8..bcf52aa86462 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -62,6 +62,7 @@ enum imx6_pcie_variants { #define IMX6_PCIE_FLAG_SUPPORTS_SUSPEND BIT(2) #define IMX6_PCIE_FLAG_HAS_CLK_INBOUND_AXI BIT(3) #define IMX6_PCIE_FLAG_HAS_CLK_AUX BIT(4) +#define IMX6_PCIE_FLAG_HAS_PHY BIT(5) #define imx6_check_flag(pci, val) (pci->drvdata->flags & val) @@ -1327,6 +1328,13 @@ static int imx6_pcie_probe(struct platform_device *pdev) "pcie_aux clock source missing or invalid\n"); } + if (imx6_check_flag(imx6_pcie, IMX6_PCIE_FLAG_HAS_PHY)) { + imx6_pcie->phy = devm_phy_get(dev, "pcie-phy"); + if (IS_ERR(imx6_pcie->phy)) + return dev_err_probe(dev, PTR_ERR(imx6_pcie->phy), + "failed to get pcie phy\n"); + } + switch (imx6_pcie->drvdata->variant) { case IMX7D: if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR) @@ -1356,11 +1364,6 @@ static int imx6_pcie_probe(struct platform_device *pdev) return dev_err_probe(dev, PTR_ERR(imx6_pcie->apps_reset), "failed to get pcie apps reset control\n"); - imx6_pcie->phy = devm_phy_get(dev, "pcie-phy"); - if (IS_ERR(imx6_pcie->phy)) - return dev_err_probe(dev, PTR_ERR(imx6_pcie->phy), - "failed to get pcie phy\n"); - break; default: break; @@ -1500,24 +1503,28 @@ static const struct imx6_pcie_drvdata drvdata[] = { [IMX8MM] = { .variant = IMX8MM, .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND | - IMX6_PCIE_FLAG_HAS_CLK_AUX, + IMX6_PCIE_FLAG_HAS_CLK_AUX | + IMX6_PCIE_FLAG_HAS_PHY, .gpr = "fsl,imx8mm-iomuxc-gpr", }, [IMX8MP] = { .variant = IMX8MP, .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND | - IMX6_PCIE_FLAG_HAS_CLK_AUX, + IMX6_PCIE_FLAG_HAS_CLK_AUX | + IMX6_PCIE_FLAG_HAS_PHY, .gpr = "fsl,imx8mp-iomuxc-gpr", }, [IMX8MQ_EP] = { .variant = IMX8MQ_EP, - .flags = IMX6_PCIE_FLAG_HAS_CLK_AUX, + .flags = IMX6_PCIE_FLAG_HAS_CLK_AUX | + IMX6_PCIE_FLAG_HAS_PHY, .mode = DW_PCIE_EP_TYPE, .gpr = "fsl,imx8mq-iomuxc-gpr", }, [IMX8MM_EP] = { .variant = IMX8MM_EP, - .flags = IMX6_PCIE_FLAG_HAS_CLK_AUX, + .flags = IMX6_PCIE_FLAG_HAS_CLK_AUX | + IMX6_PCIE_FLAG_HAS_PHY, .mode = DW_PCIE_EP_TYPE, .gpr = "fsl,imx8mm-iomuxc-gpr", }, -- 2.34.1