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From:   Mukesh Ojha <quic_mojha@quicinc.com>
To:     <maz@kernel.org>, <tglx@linutronix.de>
CC:     <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>,
        Mukesh Ojha <quic_mojha@quicinc.com>
Subject: [PATCH] irqchip/gic-v3-its: BUG_ON if stall bit is set
Date:   Thu, 7 Dec 2023 11:42:39 +0530
Message-ID: <1701929559-18252-1-git-send-email-quic_mojha@quicinc.com>
MIME-Version: 1.0
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There could be various reason that stall bit could
be set due to software errors while processing
commands in command queue is being processed and
waiting for 1s is not going to help in debugging
as command processing anyways going to be timed
out and system will continue to run and may crash
after some time due to this.

So, to debug such issues what command caused the
stall bit to set, BUG_ON right away.

Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
---
 drivers/irqchip/irq-gic-v3-its.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 9a7a74239eab..8983e0a3318c 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -1078,6 +1078,11 @@ static int its_wait_for_range_completion(struct its_node *its,
 		s64 delta;
 
 		rd_idx = readl_relaxed(its->base + GITS_CREADR);
+		/*
+		 * Check for stall bit as there is no point in waiting
+		 * for 1s if the stall bit is already set.
+		 */
+		BUG_ON(rd_idx & 1);
 
 		/*
 		 * Compute the read pointer progress, taking the
-- 
2.7.4