Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) client-ip=23.128.96.36;
Message-ID: <557bae04-13c2-44ea-bad0-9589c999c2cb@nvidia.com>
Date:   Thu, 7 Dec 2023 12:39:02 +0530
User-Agent: Mozilla Thunderbird
Subject: Re: [RFC,v14 0/5] Add DT based PCIe wake support in PCI core driver
Content-Language: en-US
To:     Krishna Chaitanya Chundru <quic_krichai@quicinc.com>,
        bhelgaas@google.com, thierry.reding@gmail.com, petlozup@nvidia.com,
        rafael.j.wysocki@intel.com, lpieralisi@kernel.org, robh@kernel.org,
        jeffy.chen@rock-chips.com
Cc:     krzysztof.kozlowski+dt@linaro.org, jonathanh@nvidia.com,
        dmitry.osipenko@collabora.com, viresh.kumar@linaro.org,
        gregkh@linuxfoundation.org, steven.price@arm.com, kw@linux.com,
        linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
        linux-pm@vger.kernel.org, vidyas@nvidia.com
References: <20230208111645.3863534-1-mmaddireddy@nvidia.com>
 <feee5e5b-565e-8575-2bbe-61b35fa8f1dd@quicinc.com>
From:   Manikanta Maddireddy <mmaddireddy@nvidia.com>
In-Reply-To: <feee5e5b-565e-8575-2bbe-61b35fa8f1dd@quicinc.com>
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 8bit
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?RnZTcVB2aEJyWHV2a1BRb1d5YjdKSElReEpMK2ZqWE85Y0ovZWhQVjR1Mmph?=
 =?utf-8?B?SU1EOFd1RENXMmthTU9xVGhTaVg0c0xzUUVNeVB2Z1B2TzBsTHpuL2tXb1BP?=
 =?utf-8?B?MUhDYld4THVOcFZ1Y2NVUjI1OTRwdmVzL3d4eWhjYTVYTTR3MncvYnNCbFNY?=
 =?utf-8?B?bXIwY3plSGNwU2ZrVmIyQmMxZzV6T2JhUUI4NGx0MHlESjRIdkh4akFBQzdZ?=
 =?utf-8?B?SWxRYVk3dlBmalhvREo1SHRyWCtHSTQzdWozQ283dG93WlJTRVlUK0FuK1lH?=
 =?utf-8?B?NlVkSkdXK1ZkMmQzckRqYUthQlpBUmtKVnpQbkVlVFFVTHdhc2NuZklEN2lO?=
 =?utf-8?B?OWovNWhTKzM4cWc5VUdiTXVpaWRscEFHTFZFa2RsQjR2TUIveG9keG9wd0ZK?=
 =?utf-8?B?WW5vMzRRK1BKUkx0YXpTTlpUcEcxcUhYQWMySk4ySjJUK2I5TThnU2JKb2dR?=
 =?utf-8?B?VndiRGFGTWR4dWFmcVdZdXB3aDQ1UExrcndvMVh4dyt0QTdDTjN0MDYzaEh2?=
 =?utf-8?B?RXZJNnZrblQyTUJnSkNGQUowUkpZQTd0RnI1TGJ6NzZIc0RNK3dkMU1pdjRl?=
 =?utf-8?B?VHFjM1BNWThYekJORmdRUFExcFN5d1VZaVlINEVQSStkTUtKeklLWWFwRTJW?=
 =?utf-8?B?dHkxUmRQY2gzZzNjU3JGSE9EMGdkUkRlYzVRRGVVYi8yVHIzem15dlpRTU5L?=
 =?utf-8?B?Yk5DM0dGL3c5dUZ3cmJqbXBWTktQSTduR01ITTRNT3phTlNLNVFzTis1NjB3?=
 =?utf-8?B?L0RUdTQ1WFNpbG5zSURYL1NOdmp4TlZsY2k5TUp4UlBiWXRLc1hOS2pvRnhN?=
 =?utf-8?B?TlJqNG9FcS93N3g0UkJXSEJyc0NFWitkVkVzM1VvWHJDemhXdFBBa1ErYURK?=
 =?utf-8?B?ZFFIVHBxbWVJcXJ6U1pjMnhlV3pWU0E1VjliN29ERVRHL1AyaXI1MEk2MDNy?=
 =?utf-8?B?akN6cm9NM090UjBZMWZqSmRpWXh3L1liRUJkQVR1dkp0L3p0aEVzclIxTTdv?=
 =?utf-8?B?S0k3WHJnc1NRN0plZjlaWmhJY0IvbmowWFVzbHRwQTZHVUJYa2h2VHRVQWpV?=
 =?utf-8?B?WGtxYnAvaWtmZWV0aXVOWHErTVVFdGhsSExseENySXB4djU5WUM3UmVsVVZz?=
 =?utf-8?B?RVhKeEZ0a0RYdjZTQTNCRHQ0R3ZhYnZZTG9JcVpIVUlCOXZxQVNIYm8rdkhI?=
 =?utf-8?B?Rm11cU4rOVI0RUk5M0NNYkVTTHZ2eDZvVFd3WkE3VGYybFJ0cEZhZnBtS2dM?=
 =?utf-8?B?UHRwYi9hbU9tUVpVS053cmFuaTlmUzloVXVyZk9jTDRuU3k5ZXBkaE9JenNB?=
 =?utf-8?B?S3BtRG95WmVlaEJuRCtEaGdudVQ2Qk02SGpnRFRWaFpKSU1XQ0VKeEVFRzBS?=
 =?utf-8?B?NjdKR0paUTVUV3E3d3orOVc4Tnh0eVdaRG4xWXlSMi8rVzB4T3Q4QWNiaExB?=
 =?utf-8?B?T2hKQVpIT3ZvMHI3UE9hc0Z1bUVXTmZGa3pyN29Kb0p3bU92Z0RIcnJUZnhO?=
 =?utf-8?B?OTVNZUZaOGN6a08vRUJKR0p0OTA0bmVGMGJLdWFhY3Y3S3Rkd09tZkIzbGEw?=
 =?utf-8?B?TGhlVHlsT2tIa3AzVHAwMFFDdFRJSTM2a3dHNWFKeWQzZ3hxYmtsMXFsRjVV?=
 =?utf-8?B?QS9nZ2hRWWw5U1NkZStQZnVsS0lUNWdGWnp1RkZYaHkzdUsrL0k2UG1Cb3Iy?=
 =?utf-8?B?MGVUZ0F0amhZTkwwZFB3dVJrSExITGhvWHliWFhYWEZsSkdZQVNWY3JUa04x?=
 =?utf-8?B?NjVEQmhEY3IzYTlpNWNCU2RJbTdiMEdKYzEwNXlUQnNoNTRRUTBlQzhCa1du?=
 =?utf-8?B?bVQvUlczRXJTYytBYzFHeXlHdDFjUTJiU2IwS0RZa3k3djl6ZFRZVFpWamZr?=
 =?utf-8?B?N1ZtcmJpTkp3NmRMbEdDYzFkazJvSDU5VkdIZ1M5bFNDTXdjUGhXKzdVT0Zk?=
 =?utf-8?B?emZZSG1uMWhFbm1STkFuYVRnRnBQMENwM3BsYXB6bHErTFMxd2NnSFpTdURh?=
 =?utf-8?B?RnVUeEVuNGRtNnBURnhGY3E2Ukk4NHlnVURUdlZqYlVsNWtyaUc2QUIwWU04?=
 =?utf-8?B?S1NMZzVFZk1VaHhhZG5GRmhEanNCcjJYaVZIMzhSQVFBUFlMVFlmNFVTWm9U?=
 =?utf-8?B?bEpXU3hPTFdxck1QSEU2V3hxRldQODMxbGM4VWN5eWhaNFdtL2ovQU1PQng3?=
 =?utf-8?B?eUE9PQ==?=
X-OriginatorOrg: Nvidia.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 2e78989f-bb83-4924-5770-08dbf6f36cb5
X-MS-Exchange-CrossTenant-AuthSource: DM6PR12MB3356.namprd12.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Dec 2023 07:09:16.8776
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: 9BKykmKhyE989EnSA00+IlaxHQozJ4tRUY7pB0sqEn+fJxsezPJTrEhx0IEPOV4RiJCdkvjdxfv9VB6zL3rtKw==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4367
X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED,
	DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,
	MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE
	autolearn=unavailable autolearn_force=no version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org
X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Wed, 06 Dec 2023 23:10:03 -0800 (PST)

Hi Krishna Chaitanya,

Unfortunately I cannot follow up on this series now.
If you have a platform with same requirement, please verify and publish 
new version.

Thanks,
Manikanta


On 06-12-2023 20:14, Krishna Chaitanya Chundru wrote:
> External email: Use caution opening links or attachments
>
>
> Hi Manikanta,
>
> I don't see any update on this series after comments.
>
> Is there  any plans to take up this series.
>
> Thanks & Regards,
>
> Krishna Chaitanya.
>
> On 2/8/2023 4:46 PM, Manikanta Maddireddy wrote:
>> Below series [1] attempted to support DT based PCIe wake feature in 
>> generic
>> PCI core driver. This series was left at v13 and final comments are not
>> addressed. I am continuing this series from v14 by addressing all 
>> comments
>> in v13. I dropped rockchip device tree patch because I don't have 
>> hardware
>> to verify it. Instead, I verified these patches on NVIDIA Jetson AGX 
>> Orin
>> Developer Kit and included its device tree changes in this series.
>>
>> [1] 
>> https://lore.kernel.org/all/20171226023646.17722-1-jeffy.chen@rock-chips.com/
>>
>> Changes in v14:
>> Updated commit message for DT bindings patch to reflect that DT 
>> properties
>> are tied to PCI-PCI Bridge.
>> Addressed review comments on PCI interrupt parsing patch.
>> Dropped rockchip device tree patch.
>> Added Jetson AGX OrinDeveloper Kit device tree and Tegra PMC patches.
>>
>> Changes in v13:
>> Fix compiler error reported by kbuild test robot 
>> <fengguang.wu@intel.com>
>>
>> Changes in v12:
>> Only add irq definitions for PCI devices and rewrite the commit message.
>> Enable the wake irq in noirq stage to avoid possible irq storm.
>>
>> Changes in v11:
>> Address Brian's comments.
>> Only support 1-per-device PCIe WAKE# pin as suggested.
>> Move to pcie port as Brian suggested.
>>
>> Changes in v10:
>> Use device_set_wakeup_capable() instead of device_set_wakeup_enable(),
>> since dedicated wakeirq will be lost in device_set_wakeup_enable(false).
>>
>> Changes in v9:
>> Add section for PCI devices and rewrite the commit message.
>> Fix check error in .cleanup().
>> Move dedicated wakeirq setup to setup() callback and use
>> device_set_wakeup_enable() to enable/disable.
>> Rewrite the commit message.
>>
>> Changes in v8:
>> Add optional "pci", and rewrite commit message.
>> Add pci-of.c and use platform_pm_ops to handle the PCIe WAKE# signal.
>> Rewrite the commit message.
>>
>> Changes in v7:
>> Move PCIE_WAKE handling into pci core.
>>
>> Changes in v6:
>> Fix device_init_wake error handling, and add some comments.
>>
>> Changes in v5:
>> Move to pci.txt
>> Rebase.
>> Use "wakeup" instead of "wake"
>>
>> Changes in v3:
>> Fix error handling.
>>
>> Changes in v2:
>> Use dev_pm_set_dedicated_wake_irq.
>>
>> Jeffy Chen (3):
>>    dt-bindings: PCI: Add definition of PCIe WAKE# irq and PCI irq
>>    of/irq: Adjust of_pci_irq parsing for multiple interrupts
>>    PCI / PM: Add support for the PCIe WAKE# signal for OF
>>
>> Manikanta Maddireddy (2):
>>    arm64: tegra: Add PCIe port node with PCIe WAKE# for C1 controller
>>    soc/tegra: pmc: Add Tegra234 PCIe wake event
>>
>>   Documentation/devicetree/bindings/pci/pci.txt |  8 +++
>>   .../nvidia/tegra234-p3737-0000+p3701-0000.dts | 11 ++++
>>   drivers/pci/of.c                              | 63 ++++++++++++++++++-
>>   drivers/pci/pci-driver.c                      | 10 +++
>>   drivers/pci/pci.c                             |  7 +++
>>   drivers/pci/pci.h                             |  8 +++
>>   drivers/soc/tegra/pmc.c                       |  1 +
>>   7 files changed, 105 insertions(+), 3 deletions(-)
>>