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Message-ID: <c86e8f75-f74a-491e-9ac0-2431a6ec4b80@nvidia.com>
Date:   Thu, 7 Dec 2023 12:54:04 +0530
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Subject: Re: [RFC,v14 4/5] arm64: tegra: Add PCIe port node with PCIe WAKE#
 for C1 controller
Content-Language: en-US
To:     Manivannan Sadhasivam <mani@kernel.org>
Cc:     bhelgaas@google.com, thierry.reding@gmail.com, petlozup@nvidia.com,
        rafael.j.wysocki@intel.com, lpieralisi@kernel.org, robh@kernel.org,
        jeffy.chen@rock-chips.com, krzysztof.kozlowski+dt@linaro.org,
        jonathanh@nvidia.com, dmitry.osipenko@collabora.com,
        viresh.kumar@linaro.org, gregkh@linuxfoundation.org,
        steven.price@arm.com, kw@linux.com, linux-pci@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org,
        vidyas@nvidia.com
References: <20230208111645.3863534-1-mmaddireddy@nvidia.com>
 <20230208111645.3863534-5-mmaddireddy@nvidia.com>
 <20231206153627.GJ12802@thinkpad>
From:   Manikanta Maddireddy <mmaddireddy@nvidia.com>
In-Reply-To: <20231206153627.GJ12802@thinkpad>
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On 06-12-2023 21:06, Manivannan Sadhasivam wrote:
> External email: Use caution opening links or attachments
>
>
> On Wed, Feb 08, 2023 at 04:46:44PM +0530, Manikanta Maddireddy wrote:
>> Add PCIe port node under the PCIe controller-1 device tree node to support
>> PCIe WAKE# interrupt for WiFi.
>>
>> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
>> ---
>>
>> Changes in v14:
>> New patch in the series to support PCIe WAKE# in NVIDIA Jetson AGX Orin.
>>
>>   .../dts/nvidia/tegra234-p3737-0000+p3701-0000.dts     | 11 +++++++++++
>>   1 file changed, 11 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
>> index 8a9747855d6b..9c89be263141 100644
>> --- a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
>> +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
>> @@ -2147,6 +2147,17 @@ pcie@14100000 {
>>
>>                        phys = <&p2u_hsio_3>;
>>                        phy-names = "p2u-0";
>> +
>> +                     pci@0,0 {
>> +                             reg = <0x0000 0 0 0 0>;
>> +                             #address-cells = <3>;
>> +                             #size-cells = <2>;
>> +                             ranges;
>> +
>> +                             interrupt-parent = <&gpio>;
>> +                             interrupts = <TEGRA234_MAIN_GPIO(L, 2) IRQ_TYPE_LEVEL_LOW>;
>> +                             interrupt-names = "wakeup";
> WAKE# should be part of the PCIe controller, not device. And the interrupt name
> should be "wake".
>
> - Mani
Hi,

Please refer to the discussion in below link, WAKE# is per PCI bridge.
https://patchwork.ozlabs.org/project/linux-pci/patch/20171226020806.32710-2-jeffy.chen@rock-chips.com/

I carried wakeup name defined in previous version, but wake seems to be 
sufficient.

Thanks,
Manikanta
>
>> +                     };
>>                };
>>
>>                pcie@14160000 {
>> --
>> 2.25.1
>>
> --
> மணிவண்ணன் சதாசிவம்