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Received: from DM6PR12MB3356.namprd12.prod.outlook.com (2603:10b6:5:38::11) by SJ2PR12MB8649.namprd12.prod.outlook.com (2603:10b6:a03:53c::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7046.34; Thu, 7 Dec 2023 08:53:59 +0000 Received: from DM6PR12MB3356.namprd12.prod.outlook.com ([fe80::1a50:8e27:5f8f:7c4d]) by DM6PR12MB3356.namprd12.prod.outlook.com ([fe80::1a50:8e27:5f8f:7c4d%5]) with mapi id 15.20.7068.025; Thu, 7 Dec 2023 08:53:59 +0000 Message-ID: <6e282e1b-39d2-4a08-bdd4-a9d02b2b7f74@nvidia.com> Date: Thu, 7 Dec 2023 14:23:46 +0530 User-Agent: Mozilla Thunderbird Subject: Re: [RFC,v14 4/5] arm64: tegra: Add PCIe port node with PCIe WAKE# for C1 controller To: Manivannan Sadhasivam Cc: bhelgaas@google.com, thierry.reding@gmail.com, petlozup@nvidia.com, rafael.j.wysocki@intel.com, lpieralisi@kernel.org, robh@kernel.org, jeffy.chen@rock-chips.com, krzysztof.kozlowski+dt@linaro.org, jonathanh@nvidia.com, dmitry.osipenko@collabora.com, viresh.kumar@linaro.org, gregkh@linuxfoundation.org, steven.price@arm.com, kw@linux.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, vidyas@nvidia.com References: <20230208111645.3863534-1-mmaddireddy@nvidia.com> <20230208111645.3863534-5-mmaddireddy@nvidia.com> <20231206153627.GJ12802@thinkpad> <20231207075952.GG2932@thinkpad> Content-Language: en-US From: Manikanta Maddireddy X-Nvconfidentiality: public In-Reply-To: <20231207075952.GG2932@thinkpad> Content-Type: text/plain; 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Thu, 07 Dec 2023 00:54:22 -0800 (PST) On 07-12-2023 13:29, Manivannan Sadhasivam wrote: > External email: Use caution opening links or attachments > > > On Thu, Dec 07, 2023 at 12:54:04PM +0530, Manikanta Maddireddy wrote: >> On 06-12-2023 21:06, Manivannan Sadhasivam wrote: >>> External email: Use caution opening links or attachments >>> >>> >>> On Wed, Feb 08, 2023 at 04:46:44PM +0530, Manikanta Maddireddy wrote: >>>> Add PCIe port node under the PCIe controller-1 device tree node to support >>>> PCIe WAKE# interrupt for WiFi. >>>> >>>> Signed-off-by: Manikanta Maddireddy >>>> --- >>>> >>>> Changes in v14: >>>> New patch in the series to support PCIe WAKE# in NVIDIA Jetson AGX Orin. >>>> >>>> .../dts/nvidia/tegra234-p3737-0000+p3701-0000.dts | 11 +++++++++++ >>>> 1 file changed, 11 insertions(+) >>>> >>>> diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts >>>> index 8a9747855d6b..9c89be263141 100644 >>>> --- a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts >>>> +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts >>>> @@ -2147,6 +2147,17 @@ pcie@14100000 { >>>> >>>> phys = <&p2u_hsio_3>; >>>> phy-names = "p2u-0"; >>>> + >>>> + pci@0,0 { >>>> + reg = <0x0000 0 0 0 0>; >>>> + #address-cells = <3>; >>>> + #size-cells = <2>; >>>> + ranges; >>>> + >>>> + interrupt-parent = <&gpio>; >>>> + interrupts = ; >>>> + interrupt-names = "wakeup"; >>> WAKE# should be part of the PCIe controller, not device. And the interrupt name >>> should be "wake". >>> >>> - Mani >> Hi, >> >> Please refer to the discussion in below link, WAKE# is per PCI bridge. >> https://patchwork.ozlabs.org/project/linux-pci/patch/20171226020806.32710-2-jeffy.chen@rock-chips.com/ >> > PCIe Host controller (RC) usually represents host bridge + PCI-PCI bridge. We do > not represent the PCI-PCI bridge in devicetree for any platforms, but only RC as > a whole. > > Moreover, PERST# is already defined in RC node. So it becomes confusing if > WAKE# is defined in a child node representing bridge. > > So please move WAKE# to RC node. > > - Mani Hi, We can define PCI-PCI bridge in device tree, refer to below device tree which has 3 ports under a controller, with PERST#(reset-gpios) defined per port. https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/arch/arm64/boot/dts/apple/t8103.dtsi#n749 Also, of_pci_setup_wake_irq() in below patch is parsing "wakeup" from PCI bridge, not from the host bridge. https://patchwork.ozlabs.org/project/linux-pci/patch/20230208111645.3863534-4-mmaddireddy@nvidia.com/ If a controller has only one port it has to define a PCI bridge under controller device tree node and add wakeup interrupt property, refer to below patch from original author. https://www.spinics.net/lists/linux-pci/msg135569.html Thanks, Manikanta > >> I carried wakeup name defined in previous version, but wake seems to be >> sufficient. >> >> Thanks, >> Manikanta >>>> + }; >>>> }; >>>> >>>> pcie@14160000 { >>>> -- >>>> 2.25.1 >>>> >>> -- >>> மணிவண்ணன் சதாசிவம் > -- > மணிவண்ணன் சதாசிவம்