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Subject: Re: [PATCH] riscv: Fix SMP when shadow call stacks are enabled
From:   patchwork-bot+linux-riscv@kernel.org
Message-Id: <170196242571.12999.13645791686392638982.git-patchwork-notify@kernel.org>
Date:   Thu, 07 Dec 2023 15:20:25 +0000
References: <20231121211958.3158576-1-samuel.holland@sifive.com>
In-Reply-To: <20231121211958.3158576-1-samuel.holland@sifive.com>
To:     Samuel Holland <samuel.holland@sifive.com>
Cc:     linux-riscv@lists.infradead.org, palmer@dabbelt.com,
        aou@eecs.berkeley.edu, andy.chiu@sifive.com, cleger@rivosinc.com,
        conor.dooley@microchip.com, greentime.hu@sifive.com,
        guoren@kernel.org, heiko@sntech.de, masahiroy@kernel.org,
        namcaov@gmail.com, paul.walmsley@sifive.com,
        samitolvanen@google.com, linux-kernel@vger.kernel.org
Precedence: bulk

Hello:

This patch was applied to riscv/linux.git (fixes)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Tue, 21 Nov 2023 13:19:29 -0800 you wrote:
> This fixes two bugs in SCS initialization for secondary CPUs. First,
> the SCS was not initialized at all in the spinwait boot path. Second,
> the code for the SBI HSM path attempted to initialize the SCS before
> enabling the MMU. However, that involves dereferencing the thread
> pointer, which requires the MMU to be enabled.
> 
> Fix both issues by setting up the SCS in the common secondary entry
> path, after enabling the MMU.
> 
> [...]

Here is the summary with links:
  - riscv: Fix SMP when shadow call stacks are enabled
    https://git.kernel.org/riscv/c/f40cab8e18ed

You are awesome, thank you!
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