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Received: from PA4PR10MB5681.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:102:263::10) by VE1PR10MB3760.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:800:16d::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7068.27; Thu, 7 Dec 2023 16:58:28 +0000 Received: from PA4PR10MB5681.EURPRD10.PROD.OUTLOOK.COM ([fe80::27ba:9922:8d12:7b3d]) by PA4PR10MB5681.EURPRD10.PROD.OUTLOOK.COM ([fe80::27ba:9922:8d12:7b3d%5]) with mapi id 15.20.7068.025; Thu, 7 Dec 2023 16:58:27 +0000 Message-ID: <21e1b508-328a-4ec0-9f1f-75773f2686c3@kontron.de> Date: Thu, 7 Dec 2023 17:58:25 +0100 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 04/10] drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Content-Language: en-US, de-DE To: Dario Binacchi , linux-kernel@vger.kernel.org Cc: Maxime Ripard , Neil Armstrong , Robert Foss , Andrzej Hajda , Thomas Zimmermann , Jonas Karlman , Amarula patchwork , dri-devel@lists.freedesktop.org, Jernej Skrabec , Jagan Teki , Marek Szyprowski , michael@amarulasolutions.com, Laurent Pinchart References: <20231207141723.108004-1-dario.binacchi@amarulasolutions.com> <20231207141723.108004-5-dario.binacchi@amarulasolutions.com> From: Frieder Schrempf In-Reply-To: <20231207141723.108004-5-dario.binacchi@amarulasolutions.com> Content-Type: text/plain; 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Thu, 07 Dec 2023 08:58:39 -0800 (PST) On 07.12.23 15:16, Dario Binacchi wrote: > The patch completes the setting of CLKLANE_STOP for the imx8mn and imx8mp > platforms (i. e. not exynos). This also affects i.MX8MM, so better just mention i.MX in general in the commit message. > > Co-developed-by: Michael Trimarchi > Signed-off-by: Michael Trimarchi > Signed-off-by: Dario Binacchi > --- > > (no changes since v1) > > drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c > index 15bf05b2bbe4..13f181c99d7e 100644 > --- a/drivers/gpu/drm/bridge/samsung-dsim.c > +++ b/drivers/gpu/drm/bridge/samsung-dsim.c > @@ -96,6 +96,7 @@ > #define DSIM_MFLUSH_VS BIT(29) > /* This flag is valid only for exynos3250/3472/5260/5430 */ > #define DSIM_CLKLANE_STOP BIT(30) > +#define DSIM_NON_CONTINUOUS_CLKLANE BIT(31) > > /* DSIM_ESCMODE */ > #define DSIM_TX_TRIGGER_RST BIT(4) > @@ -945,8 +946,12 @@ static int samsung_dsim_init_link(struct samsung_dsim *dsi) > * power consumption. > */ > if (driver_data->has_clklane_stop && > - dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) > + dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) { > + if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type)) > + reg |= DSIM_NON_CONTINUOUS_CLKLANE; > + > reg |= DSIM_CLKLANE_STOP; > + } I really wonder what the difference between DSIM_NON_CONTINUOUS_CLKLANE and DSIM_CLKLANE_STOP is. If Exynos only has the latter, it's pretty clear what to use. But as i.MX has both of these bits, should both be set? Or is setting DSIM_NON_CONTINUOUS_CLKLANE enough and we should leave DSIM_CLKLANE_STOP alone? Maybe someone has a clue here. The description of the bits in the RM is: DSIM_NON_CONTINUOUS_CLKLANE - Non-continuous clock mode DSIM_CLKLANE_STOP - PHY clock lane On/Off for ESD > samsung_dsim_write(dsi, DSIM_CONFIG_REG, reg); > > lanes_mask = BIT(dsi->lanes) - 1;