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Date:   Fri, 8 Dec 2023 12:10:23 +0800
From:   Herbert Xu <herbert@gondor.apana.org.au>
To:     Zhiqi Song <songzhiqi1@huawei.com>
Cc:     davem@davemloft.net, linux-crypto@vger.kernel.org,
        linux-kernel@vger.kernel.org, wangzhou1@hisilicon.com,
        fanghao11@huawei.com, liulongfang@huawei.com, qianweili@huawei.com,
        shenyang39@huawei.com
Subject: Re: [PATCH 0/5] crypto: hisilicon - fix the process to obtain
 capability register value
Message-ID: <ZXKXL7zTnD2Yxdum@gondor.apana.org.au>
References: <20231202091722.1974582-1-songzhiqi1@huawei.com>
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On Sat, Dec 02, 2023 at 05:17:17PM +0800, Zhiqi Song wrote:
> This patchset fixes the process to obtain the value of capability
> registers related to irq and alg support info. Pre-store the valid
> values of them.
> 
> Wenkai Lin (1):
>   crypto: hisilicon/qm - add a function to set qm algs
> 
> Zhiqi Song (4):
>   crypto: hisilicon/qm - save capability registers in qm init process
>   crypto: hisilicon/hpre - save capability registers in probe process
>   crypto: hisilicon/sec2 - save capability registers in probe process
>   crypto: hisilicon/zip - save capability registers in probe process
> 
>  drivers/crypto/hisilicon/hpre/hpre_main.c  | 122 +++++++++++----------
>  drivers/crypto/hisilicon/qm.c              |  98 +++++++++++++++--
>  drivers/crypto/hisilicon/sec2/sec.h        |   7 ++
>  drivers/crypto/hisilicon/sec2/sec_crypto.c |  10 +-
>  drivers/crypto/hisilicon/sec2/sec_main.c   |  70 ++++++------
>  drivers/crypto/hisilicon/zip/zip_main.c    | 120 +++++++++++---------
>  include/linux/hisi_acc_qm.h                |  20 +++-
>  7 files changed, 293 insertions(+), 154 deletions(-)
> 
> -- 
> 2.30.0

All applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
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