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[23.128.96.38]) by mx.google.com with ESMTPS id k30-20020a63ba1e000000b005be0073639fsi1044993pgf.165.2023.12.07.23.15.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 23:15:36 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) client-ip=23.128.96.38; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=hisilicon.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id 4E7AD807329A; Thu, 7 Dec 2023 23:15:13 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233255AbjLHHO4 (ORCPT + 99 others); Fri, 8 Dec 2023 02:14:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233184AbjLHHOy (ORCPT ); Fri, 8 Dec 2023 02:14:54 -0500 Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D87AC10EB; Thu, 7 Dec 2023 23:14:59 -0800 (PST) Received: from kwepemd100008.china.huawei.com (unknown [172.30.72.57]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4Smj7D0TKPzYspD; Fri, 8 Dec 2023 15:14:16 +0800 (CST) Received: from [10.67.121.2] (10.67.121.2) by kwepemd100008.china.huawei.com (7.221.188.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.1258.28; Fri, 8 Dec 2023 15:14:56 +0800 Message-ID: <6572C270.6050101@hisilicon.com> Date: Fri, 8 Dec 2023 15:14:56 +0800 From: Wei Xu User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.2.0 MIME-Version: 1.0 To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd CC: , , , Subject: Re: [PATCH] dt-bindings: hisilicon: Merge hi3620-clock into hisilicon,sysctrl binding References: <20231122235059.2966532-1-robh@kernel.org> In-Reply-To: <20231122235059.2966532-1-robh@kernel.org> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.67.121.2] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemd100008.china.huawei.com (7.221.188.193) X-CFilter-Loop: Reflected X-Spam-Status: No, score=-3.0 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Thu, 07 Dec 2023 23:15:14 -0800 (PST) Hi Rob, On 2023/11/23 7:50, Rob Herring wrote: > The hi3620-clock binding is simple and always a child of the > "hisilicon,sysctrl" node, so just add it into the hisilicon,sysctrl > binding and drop the old txt binding. > > Signed-off-by: Rob Herring > --- Applied to the HiSilicon arm64 dt tree. Thanks! Best Regards, Wei > .../arm/hisilicon/controller/sysctrl.yaml | 17 ++++++++++++++++ > .../bindings/clock/hi3620-clock.txt | 20 ------------------- > 2 files changed, 17 insertions(+), 20 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/clock/hi3620-clock.txt > > diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml > index 5a53d433b6f0..7a221e1c09df 100644 > --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml > +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml > @@ -82,6 +82,23 @@ properties: > > ranges: true > > +patternProperties: > + '^clock@': > + type: object > + additionalProperties: false > + > + properties: > + compatible: > + enum: > + - hisilicon,hi3620-clock > + - hisilicon,hi3620-mmc-clock > + > + reg: > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + > required: > - compatible > - reg > diff --git a/Documentation/devicetree/bindings/clock/hi3620-clock.txt b/Documentation/devicetree/bindings/clock/hi3620-clock.txt > deleted file mode 100644 > index dad6269f52c5..000000000000 > --- a/Documentation/devicetree/bindings/clock/hi3620-clock.txt > +++ /dev/null > @@ -1,20 +0,0 @@ > -* Hisilicon Hi3620 Clock Controller > - > -The Hi3620 clock controller generates and supplies clock to various > -controllers within the Hi3620 SoC. > - > -Required Properties: > - > -- compatible: should be one of the following. > - - "hisilicon,hi3620-clock" - controller compatible with Hi3620 SoC. > - - "hisilicon,hi3620-mmc-clock" - controller specific for Hi3620 mmc. > - > -- reg: physical base address of the controller and length of memory mapped > - region. > - > -- #clock-cells: should be 1. > - > -Each clock is assigned an identifier and client nodes use this identifier > -to specify the clock which they consume. > - > -All these identifier could be found in . >