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Thu, 07 Dec 2023 23:17:26 -0800 (PST) Received: from snowbird ([136.25.84.107]) by smtp.gmail.com with ESMTPSA id y130-20020a62ce88000000b006ce9d2471c0sm956133pfg.60.2023.12.07.23.17.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 23:17:25 -0800 (PST) Date: Thu, 7 Dec 2023 23:17:23 -0800 From: Dennis Zhou To: Alexandre Ghiti Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrey Ryabinin , Alexander Potapenko , Andrey Konovalov , Dmitry Vyukov , Vincenzo Frascino , Arnd Bergmann , Tejun Heo , Christoph Lameter , Andrew Morton , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, linux-arch@vger.kernel.org, linux-mm@kvack.org Subject: Re: [PATCH 0/2] riscv: Enable percpu page first chunk allocator Message-ID: References: <20231110140721.114235-1-alexghiti@rivosinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231110140721.114235-1-alexghiti@rivosinc.com> X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 07 Dec 2023 23:17:32 -0800 (PST) Hello, On Fri, Nov 10, 2023 at 03:07:19PM +0100, Alexandre Ghiti wrote: > While working with pcpu variables, I noticed that riscv did not support > first chunk allocation in the vmalloc area which may be needed as a fallback > in case of a sparse NUMA configuration. > > patch 1 starts by introducing a new function flush_cache_vmap_early() which > is needed since a new vmalloc mapping is established and directly accessed: > on riscv, this would likely fail in case of a reordered access or if the > uarch caches invalid entries in TLB. > > patch 2 simply enables the page percpu first chunk allocator in riscv. > > Alexandre Ghiti (2): > mm: Introduce flush_cache_vmap_early() and its riscv implementation > riscv: Enable pcpu page first chunk allocator > > arch/riscv/Kconfig | 2 ++ > arch/riscv/include/asm/cacheflush.h | 3 ++- > arch/riscv/include/asm/tlbflush.h | 2 ++ > arch/riscv/mm/kasan_init.c | 8 ++++++++ > arch/riscv/mm/tlbflush.c | 5 +++++ > include/asm-generic/cacheflush.h | 6 ++++++ > mm/percpu.c | 8 +------- > 7 files changed, 26 insertions(+), 8 deletions(-) > > -- > 2.39.2 > I've applied this to percpu#for-6.8. Thanks, Dennis