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[2620:137:e000::3:2]) by mx.google.com with ESMTPS id i3-20020a170902c94300b001cffce3a2e2si1141068pla.426.2023.12.07.23.29.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 23:29:25 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) client-ip=2620:137:e000::3:2; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tFVI8hH5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id D2F2E80EAD76; Thu, 7 Dec 2023 23:29:22 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233159AbjLHH25 (ORCPT + 99 others); Fri, 8 Dec 2023 02:28:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232216AbjLHH24 (ORCPT ); Fri, 8 Dec 2023 02:28:56 -0500 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9CACB171F; Thu, 7 Dec 2023 23:28:59 -0800 (PST) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3B87ShMV065745; Fri, 8 Dec 2023 01:28:43 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1702020523; bh=P995/KmxRn+AapdfP+hEBCbOthYU7XKcxWvchCC87rQ=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=tFVI8hH5Eg9BgaB/gBhm3uSRsd8lswY6AWXuNqBIucDUYWsFurUI6UpeU5XGErZS4 2KUZ2L0nwJTNl5CDSvTH9U+C73lbAQ1zUz5rm6D3uKeNkAQbpaPRy7GTS73mJHyNIh rMbkkIn72dEmTKipGUWyvzPkhKLe4Yd3GtEZL4w4= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3B87ShWW011538 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 8 Dec 2023 01:28:43 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 8 Dec 2023 01:28:43 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 8 Dec 2023 01:28:43 -0600 Received: from [10.249.135.225] ([10.249.135.225]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3B87SdsH056714; Fri, 8 Dec 2023 01:28:40 -0600 Message-ID: Date: Fri, 8 Dec 2023 12:58:38 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/3] arm64: dts: ti: k3-am642-evm: add overlay for icssg1 2nd port Content-Language: en-US To: Andrew Lunn , MD Danish Anwar CC: Vignesh Raghavendra , Nishanth Menon , Conor Dooley , Krzysztof Kozlowski , Rob Herring , , , , Tero Kristo , , References: <20231207081917.340167-1-danishanwar@ti.com> <20231207081917.340167-4-danishanwar@ti.com> From: "Anwar, Md Danish" In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Thu, 07 Dec 2023 23:29:23 -0800 (PST) On 12/8/2023 3:10 AM, Andrew Lunn wrote: >> + mdio-mux-2 { >> + compatible = "mdio-mux-multiplexer"; >> + mux-controls = <&mdio_mux>; >> + mdio-parent-bus = <&icssg1_mdio>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + mdio@0 { >> + reg = <0x0>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + icssg1_phy2: ethernet-phy@3 { >> + reg = <3>; >> + tx-internal-delay-ps = <250>; >> + rx-internal-delay-ps = <2000>; >> + }; >> + }; > > That looks odd. A mux generally has > 1 mdio bus. Otherwise its not > really a mux. > We are disabling node `mdio-mux-1` which has the `cpsw3g_mdio` bus and then adding a new node `mdio-mux-2` which has the `icssg1_mdio` bus. The mux can actually have two different mdio buses. The patch actually disables the mux1 node and creates a new node for icssg1_mdio bus so that cpsw3g mdio bus is disabled properly. We can modify the existing `mdio-mux-1` as well (added the code below) instead of disabling mux1 and creating mux2 node. &mdio_mux_1 { mdio-parent-bus = <&icssg1_mdio>; #address-cells = <1>; #size-cells = <0>; mdio@0 { reg = <0x0>; #address-cells = <1>; #size-cells = <0>; icssg1_phy2: ethernet-phy@3 { reg = <3>; tx-internal-delay-ps = <250>; rx-internal-delay-ps = <2000>; }; }; }; Let me know what do you think. Is the approach in the patch correct or should I modify existing mux node only? > And this mux hardware exists all the time right? So it should be in > the .dtsi file. > Agreed. But the mdio-mux-1 node was added in k3-am642-evm.dts by the commit 985204ecae1c37d55372874ff9146231d28fccc6. I did the same with mdio-mux-2 node. > Andrew -- Thanks and Regards, Md Danish Anwar