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Fri, 08 Dec 2023 09:25:31 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3B89PTd9027477 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 8 Dec 2023 09:25:29 GMT Received: from [10.50.44.194] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Fri, 8 Dec 2023 01:25:26 -0800 Message-ID: <7472fe73-e7a0-5c8c-6e85-655db028a5c3@quicinc.com> Date: Fri, 8 Dec 2023 14:55:21 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.3.2 Subject: Re: [PATCH v2 05/17] scsi: ufs: qcom: Remove the warning message when core_reset is not available Content-Language: en-US To: Manivannan Sadhasivam , , CC: , , , , , , References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> <20231208065902.11006-6-manivannan.sadhasivam@linaro.org> From: Nitin Rawat In-Reply-To: <20231208065902.11006-6-manivannan.sadhasivam@linaro.org> Content-Type: text/plain; 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Fri, 08 Dec 2023 01:25:58 -0800 (PST) On 12/8/2023 12:28 PM, Manivannan Sadhasivam wrote: > core_reset is optional, so there is no need to warn the user if it is not > available. > > Reviewed-by: Andrew Halaney > Signed-off-by: Manivannan Sadhasivam > --- > drivers/ufs/host/ufs-qcom.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c > index dc93b1c5ca74..d474de0739e4 100644 > --- a/drivers/ufs/host/ufs-qcom.c > +++ b/drivers/ufs/host/ufs-qcom.c > @@ -296,10 +296,8 @@ static int ufs_qcom_host_reset(struct ufs_hba *hba) > struct ufs_qcom_host *host = ufshcd_get_variant(hba); > bool reenable_intr; > > - if (!host->core_reset) { > - dev_warn(hba->dev, "%s: reset control not set\n", __func__); > + if (!host->core_reset) > return 0; > - } > > reenable_intr = hba->is_irq_enabled; > disable_irq(hba->irq); Hi Mani, I think core reset is not frequent. It happen during only probe ,error handler. core reset is needed in kernel to cleanup UFS phy and controller configuration before UFS HLOS operation starts as per HPG. Having existing warn print can be used to to debug or atleast know core_reset is missed in device tree to give indication complete reset hasn't been done and we could still be operating in bootloader configuration. Regards, Nitin