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charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.4 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Fri, 08 Dec 2023 16:27:09 -0800 (PST) On Tue, Nov 7, 2023 at 6:58=E2=80=AFAM wrote: > > From: Isaku Yamahata > > Wire up TDX PV port IO hypercall to the KVM backend function. > > Signed-off-by: Isaku Yamahata > Reviewed-by: Paolo Bonzini > --- > arch/x86/kvm/vmx/tdx.c | 57 ++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 57 insertions(+) > > diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c > index 4e48989d364f..d4b09255ad32 100644 > --- a/arch/x86/kvm/vmx/tdx.c > +++ b/arch/x86/kvm/vmx/tdx.c > @@ -1140,6 +1140,61 @@ static int tdx_emulate_hlt(struct kvm_vcpu *vcpu) > return kvm_emulate_halt_noskip(vcpu); > } > > +static int tdx_complete_pio_in(struct kvm_vcpu *vcpu) > +{ > + struct x86_emulate_ctxt *ctxt =3D vcpu->arch.emulate_ctxt; > + unsigned long val =3D 0; > + int ret; > + > + WARN_ON_ONCE(vcpu->arch.pio.count !=3D 1); > + > + ret =3D ctxt->ops->pio_in_emulated(ctxt, vcpu->arch.pio.size, > + vcpu->arch.pio.port, &val, 1); > + WARN_ON_ONCE(!ret); > + > + tdvmcall_set_return_code(vcpu, TDG_VP_VMCALL_SUCCESS); > + tdvmcall_set_return_val(vcpu, val); > + > + return 1; > +} > + > +static int tdx_emulate_io(struct kvm_vcpu *vcpu) > +{ > + struct x86_emulate_ctxt *ctxt =3D vcpu->arch.emulate_ctxt; > + unsigned long val =3D 0; > + unsigned int port; > + int size, ret; > + bool write; > + > + ++vcpu->stat.io_exits; > + > + size =3D tdvmcall_a0_read(vcpu); > + write =3D tdvmcall_a1_read(vcpu); > + port =3D tdvmcall_a2_read(vcpu); > + > + if (size !=3D 1 && size !=3D 2 && size !=3D 4) { > + tdvmcall_set_return_code(vcpu, TDG_VP_VMCALL_INVALID_OPER= AND); > + return 1; > + } > + > + if (write) { > + val =3D tdvmcall_a3_read(vcpu); > + ret =3D ctxt->ops->pio_out_emulated(ctxt, size, port, &va= l, 1); > + > + /* No need for a complete_userspace_io callback. */ > + vcpu->arch.pio.count =3D 0; > + } else { > + ret =3D ctxt->ops->pio_in_emulated(ctxt, size, port, &val= , 1); > + if (!ret) > + vcpu->arch.complete_userspace_io =3D tdx_complete= _pio_in; > + else > + tdvmcall_set_return_val(vcpu, val); > + } > + if (ret) > + tdvmcall_set_return_code(vcpu, TDG_VP_VMCALL_SUCCESS); In the case of a write operation that needs to exit to userspace, pio_out_emulated is going to return 0 which means that the return code is never set by tdx_emulate_io. The reason this code is working now is because r10 is already set to 0 by the guest as part of the call to tdvmcall and never gets written by the host. > + return ret; > +} > + > static int handle_tdvmcall(struct kvm_vcpu *vcpu) > { > if (tdvmcall_exit_type(vcpu)) > @@ -1150,6 +1205,8 @@ static int handle_tdvmcall(struct kvm_vcpu *vcpu) > return tdx_emulate_cpuid(vcpu); > case EXIT_REASON_HLT: > return tdx_emulate_hlt(vcpu); > + case EXIT_REASON_IO_INSTRUCTION: > + return tdx_emulate_io(vcpu); > default: > break; > } > -- > 2.25.1 >