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Sat, 9 Dec 2023 15:39:07 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.9.0-alpha0-1178-geeaf0069a7-fm-20231114.001-geeaf0069 MIME-Version: 1.0 Message-Id: <5090a015-5b6f-44be-bb25-d2ca3fdf5d40@app.fastmail.com> In-Reply-To: <4f277982-fffb-4fe1-bc02-007633400f31@sifive.com> References: <20231122030621.3759313-1-samuel.holland@sifive.com> <20231122030621.3759313-4-samuel.holland@sifive.com> <20231123-headdress-mold-0dd7a74477f7@wendy> <20231130004224.GE2513828@dev-arch.thelio-3990X> <4f277982-fffb-4fe1-bc02-007633400f31@sifive.com> Date: Sat, 09 Dec 2023 21:38:45 +0100 From: "Arnd Bergmann" To: "Samuel Holland" , "Nathan Chancellor" , "Conor.Dooley" Cc: "Palmer Dabbelt" , "Harry Wentland" , "Leo Li" , "Rodrigo Siqueira" , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, "Dave Airlie" , =?UTF-8?Q?Christian_K=C3=B6nig?= , "Alex Deucher" , "Pan Xinhui" , "Daniel Vetter" , amd-gfx@lists.freedesktop.org, llvm@lists.linux.dev Subject: Re: [PATCH 3/3] drm/amd/display: Support DRM_AMD_DC_FP on RISC-V Content-Type: text/plain X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Sat, 09 Dec 2023 12:39:25 -0800 (PST) On Fri, Dec 8, 2023, at 06:04, Samuel Holland wrote: > On 2023-11-29 6:42 PM, Nathan Chancellor wrote: >> On Thu, Nov 23, 2023 at 02:23:01PM +0000, Conor Dooley wrote: >>> On Tue, Nov 21, 2023 at 07:05:15PM -0800, Samuel Holland wrote: >>>> RISC-V uses kernel_fpu_begin()/kernel_fpu_end() like several other >>>> architectures. Enabling hardware FP requires overriding the ISA string >>>> for the relevant compilation units. >>> >>> Ah yes, bringing the joy of frame-larger-than warnings to RISC-V: >>> ../drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:58:13: warning: stack frame size (2416) exceeds limit (2048) in 'DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation' [-Wframe-larger-than] >> >> :( >> >>> Nathan, have you given up on these being sorted out? >> >> Does your configuration have KASAN (I don't think RISC-V supports >> KCSAN)? It is possible that dml/dcn32 needs something similar to commit >> 6740ec97bcdb ("drm/amd/display: Increase frame warning limit with KASAN >> or KCSAN in dml2")? >> >> I am not really interested in playing whack-a-mole with these warnings >> like I have done in the past for the reasons I outlined here: >> >> https://lore.kernel.org/20231019205117.GA839902@dev-arch.thelio-3990X/ > > I also see one of these with clang 17 even with KASAN disabled: > > drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:37:6: > warning: stack frame size (2208) exceeds limit (2048) in 'dml32_recalculate' > [-Wframe-larger-than] > void dml32_recalculate(struct display_mode_lib *mode_lib) > > ^ > 1532/2208 (69.38%) spills, 676/2208 (30.62%) variables > > So I'm in favor of just raising the limit for these files for clang, like you > suggested in the linked thread. How about just adding a BUG_ON(IS_ENABLED(CONFIG_RISCV)) in that function? That should also avoid the build failure but give a better indication of where the problem is if someone actually runs into that function and triggers a runtime stack overflow. Arnd