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Subject: RE: [PATCH v6 0/6] iommufd: Add nesting infrastructure (part 2/2)
Thread-Topic: [PATCH v6 0/6] iommufd: Add nesting infrastructure (part 2/2)
Thread-Index: AQHaGVcGB9517zktWkq6XlvDSMgylbCgUKQAgAMup4A=
Date:   Mon, 11 Dec 2023 02:29:55 +0000
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 <20231209014726.GA2945299@nvidia.com>
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> From: Jason Gunthorpe <jgg@nvidia.com>
> Sent: Saturday, December 9, 2023 9:47 AM
>=20
> What is in a Nested domain:
>  Intel: A single IO page table refereed to by a PASID entry
>         Each vDomain-ID,PASID allocates a unique nesting domain
>  AMD: A GCR3 table pointer
>       Nesting domains are created for every unique GCR3 pointer.
>       vDomain-ID can possibly refer to multiple Nesting domains :(
>  ARM: A CD table pointer
>       Nesting domains are created for every unique CD table top pointer.

this AMD/ARM difference is not very clear to me.

How could a vDomain-ID refer to multiple GCR3 pointers? Wouldn't it
lead to cache tag conflict when a same PASID entry in multiple GCR3 tables
points to different I/O page tables?