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X-CSE-ConnectionGUID: 8UrTKvbkTlm7b+wAo40GdQ== X-CSE-MsgGUID: /JF1wvFzSLWglB/cfw89gA== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.04,267,1695711600"; d="asc'?scan'208";a="180266216" X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 11 Dec 2023 00:59:12 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 11 Dec 2023 00:59:06 -0700 Received: from wendy (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35 via Frontend Transport; Mon, 11 Dec 2023 00:59:02 -0700 Date: Mon, 11 Dec 2023 07:58:31 +0000 From: Conor Dooley To: JeeHeng Sia CC: Shengyu Qu , "kernel@esmil.dk" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "krzk@kernel.org" , "conor+dt@kernel.org" , "paul.walmsley@sifive.com" , "palmer@dabbelt.com" , "aou@eecs.berkeley.edu" , "daniel.lezcano@linaro.org" , "tglx@linutronix.de" , "conor@kernel.org" , "anup@brainfault.org" , "gregkh@linuxfoundation.org" , "jirislaby@kernel.org" , "michal.simek@amd.com" , Michael Zhu , "drew@beagleboard.org" , "devicetree@vger.kernel.org" , "linux-riscv@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Leyfoon Tan Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree Message-ID: <20231211-submerge-vegan-244889f1751c@wendy> References: <20231201121410.95298-1-jeeheng.sia@starfivetech.com> <20231201121410.95298-7-jeeheng.sia@starfivetech.com> <358bcdb3f0ab4a7b9d6bbe17ca1a696d@EXMBX066.cuchost.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="hd6P+t5VhD/fQIFu" Content-Disposition: inline In-Reply-To: <358bcdb3f0ab4a7b9d6bbe17ca1a696d@EXMBX066.cuchost.com> X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Sun, 10 Dec 2023 23:59:25 -0800 (PST) --hd6P+t5VhD/fQIFu Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Dec 11, 2023 at 01:38:06AM +0000, JeeHeng Sia wrote: >=20 > > From: Shengyu Qu > > Sent: Friday, December 8, 2023 8:09 PM > > Does the dubhe-80 cores actually support vector? Or vector support > >=20 > > doesn't exist on actual silicon? > We don't have a use case for vector application in JH8100 I am sorry, but I am not clear on what this means. Do the CPUs on the JH8100 support vector or not? --hd6P+t5VhD/fQIFu Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZXbBIwAKCRB4tDGHoIJi 0qLgAQDdnIyMYOcscMM6Xn9n15BVhbDy7y4Y61q9DeXzpLmYtgD9HbHQYif0r4fF BViOKAMeIVjMPAbnlXqZaG4Vt1VXzgY= =Z2qE -----END PGP SIGNATURE----- --hd6P+t5VhD/fQIFu--