Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) client-ip=2620:137:e000::3:4;
Message-ID: <9f63b81d-1826-411f-b310-e726e5eb5cb3@ti.com>
Date:   Mon, 11 Dec 2023 15:30:54 +0530
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 3/3] arm64: dts: ti: k3-am642-evm: add overlay for icssg1
 2nd port
Content-Language: en-US
To:     "Anwar, Md Danish" <a0501179@ti.com>, Andrew Lunn <andrew@lunn.ch>
CC:     Vignesh Raghavendra <vigneshr@ti.com>, Nishanth Menon <nm@ti.com>,
        Conor Dooley <conor+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        Tero Kristo <kristo@kernel.org>, <srk@ti.com>,
        <r-gunasekaran@ti.com>
References: <20231207081917.340167-1-danishanwar@ti.com>
 <20231207081917.340167-4-danishanwar@ti.com>
 <fe6499b3-fbda-4e2d-9b5e-92cc60d3a79c@lunn.ch>
 <afec7eaa-9ef5-447f-9619-9721937fe805@ti.com>
From:   MD Danish Anwar <danishanwar@ti.com>
In-Reply-To: <afec7eaa-9ef5-447f-9619-9721937fe805@ti.com>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: 7bit
Precedence: bulk

Hi Andrew,

On 08/12/23 12:58 pm, Anwar, Md Danish wrote:
> On 12/8/2023 3:10 AM, Andrew Lunn wrote:
>>> +	mdio-mux-2 {
>>> +		compatible = "mdio-mux-multiplexer";
>>> +		mux-controls = <&mdio_mux>;
>>> +		mdio-parent-bus = <&icssg1_mdio>;
>>> +		#address-cells = <1>;
>>> +		#size-cells = <0>;
>>> +
>>> +		mdio@0 {
>>> +			reg = <0x0>;
>>> +			#address-cells = <1>;
>>> +			#size-cells = <0>;
>>> +
>>> +			icssg1_phy2: ethernet-phy@3 {
>>> +				reg = <3>;
>>> +				tx-internal-delay-ps = <250>;
>>> +				rx-internal-delay-ps = <2000>;
>>> +			};
>>> +		};
>>
>> That looks odd. A mux generally has > 1 mdio bus. Otherwise its not
>> really a mux.
>>
> 
> We are disabling node `mdio-mux-1` which has the `cpsw3g_mdio` bus and
> then adding a new node `mdio-mux-2` which has the `icssg1_mdio` bus. The
> mux can actually have two different mdio buses. The patch actually
> disables the mux1 node and creates a new node for icssg1_mdio bus so
> that cpsw3g mdio bus is disabled properly.
> 
> We can modify the existing `mdio-mux-1` as well (added the code below)
> instead of disabling mux1 and creating mux2 node.
> 
> &mdio_mux_1 {
> 	mdio-parent-bus = <&icssg1_mdio>;
> 	#address-cells = <1>;
> 	#size-cells = <0>;
> 
> 	mdio@0 {
> 		reg = <0x0>;
> 		#address-cells = <1>;
> 		#size-cells = <0>;
> 
> 		icssg1_phy2: ethernet-phy@3 {
> 			reg = <3>;
> 			tx-internal-delay-ps = <250>;
> 			rx-internal-delay-ps = <2000>;
> 		};
> 	};
> };
> 
> Let me know what do you think. Is the approach in the patch correct or
> should I modify existing mux node only?
> 

Can you please let me know which approach should I follow here?

>> And this mux hardware exists all the time right? So it should be in
>> the .dtsi file.
>>
> 
> Agreed. But the mdio-mux-1 node was added in k3-am642-evm.dts by the
> commit 985204ecae1c37d55372874ff9146231d28fccc6. I did the same with
> mdio-mux-2 node.
> 
>> 	Andrew
> 

-- 
Thanks and Regards,
Danish