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Mon, 11 Dec 2023 05:16:46 -0600 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 11 Dec 2023 05:16:45 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 11 Dec 2023 05:16:45 -0600 Received: from [172.24.227.9] (uda0492258.dhcp.ti.com [172.24.227.9]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3BBBGfgw063959; Mon, 11 Dec 2023 05:16:42 -0600 Message-ID: <750c2b6b-8f24-4b86-996f-6f50cf46d81b@ti.com> Date: Mon, 11 Dec 2023 16:46:41 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird CC: , , , , , , , , , , , Subject: Re: [PATCH v2 1/2] arm64: dts: ti: k3-j721e-evm: Add overlay for PCIE0 Endpoint Mode Content-Language: en-US To: Andrew Davis References: <20231115085204.3578616-1-s-vadapalli@ti.com> <20231115085204.3578616-2-s-vadapalli@ti.com> From: Siddharth Vadapalli In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Mon, 11 Dec 2023 03:17:25 -0800 (PST) Hello Andrew, On 05/12/23 21:43, Andrew Davis wrote: > On 11/15/23 2:52 AM, Siddharth Vadapalli wrote: >> Add overlay to enable the PCIE0 instance of PCIe on J721E-EVM in >> Endpoint mode of operation. >> >> Signed-off-by: Siddharth Vadapalli >> --- >>   arch/arm64/boot/dts/ti/Makefile               |  3 ++ >>   .../boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso    | 53 +++++++++++++++++++ >>   2 files changed, 56 insertions(+) >>   create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso >> >> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile >> index 77a347f9f47d..5620db44d4dc 100644 >> --- a/arch/arm64/boot/dts/ti/Makefile >> +++ b/arch/arm64/boot/dts/ti/Makefile >> @@ -66,6 +66,8 @@ dtb-$(CONFIG_ARCH_K3) += k3-j7200-evm.dtb >>   k3-j721e-evm-dtbs := k3-j721e-common-proc-board.dtb >> k3-j721e-evm-quad-port-eth-exp.dtbo >>   dtb-$(CONFIG_ARCH_K3) += k3-j721e-beagleboneai64.dtb >>   dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm.dtb >> +k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-evm.dtb k3-j721e-evm-pcie0-ep.dtbo >> +dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-pcie0-ep.dtb > > Do you really need to produce this pre-combined DTB file? If you would rather > just the overlay produced which could be applied at load-time (I prefer this), > then you should do as Jai has done[0]. Add just the overlay, and test its > application using a dummy target. Thank you for pointing it out. I will implement your suggestion and post the v3 series. -- Regards, Siddharth.