Received: by 2002:a05:7412:8d10:b0:f3:1519:9f41 with SMTP id bj16csp3912113rdb; Mon, 11 Dec 2023 03:58:55 -0800 (PST) X-Google-Smtp-Source: AGHT+IGoQQeR3+a5EUT6jrRqTzB/n7ZaMwAmeuQcF2J6Vrb32iJxVfKM6Fle9HAxdltEmONNSGlQ X-Received: by 2002:a17:903:40ca:b0:1d0:9e13:8b89 with SMTP id t10-20020a17090340ca00b001d09e138b89mr2197645pld.82.1702295935011; Mon, 11 Dec 2023 03:58:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702295934; cv=none; d=google.com; s=arc-20160816; b=ywe7lBwYEAueA6qRbHt/WRfV5M3MSQ8S3xlpPBxfKgQxq/rg2qd0Ypup4rLJC/fD4l c/1W+avD5XCPTEpmaCnjpYP4p+Ql8OrEfTWzVkjI5bca8llSrm1bzNQRtZsFuwF0mZaX yuFvRmYoI+oEbxPp3PE+ekrq5bXIE7uypQFXG3PhTAAZJCjQuu2y+3F8GEMjQDhJApwy k3vpq2d3m4ZHnyozIBBncrK8iCHF63bwLHrvNJT/VLExXTm0Jf22AHl5YaKrvqDPHgHg Put278SC2L8JtYosUIG7XLpKPpguM9eNnUH1DnJgWB6JtqQPLrHefnIKCqbljxrY291Y +tcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=zb21FgrwTHHIjSU2lLqUEQQ7s329de26aUDP8GoQ+6A=; fh=UxFpKtBK5VEiehKMA7YEJ/g9njmupgYZNYvE1WeoN9M=; b=HSdKSSp0hyviT1tparGTAm3jfNotevZsuxc+u/a/0d/+3Efu/0o56bWFb2kBBaseo4 vUDiiPT3rqQA5FC19FTlh6q9lLfjI123TKoc8BiyEpKwo5K8CDwpevLdL2uKZOec91fI ICC0fe5/XKHUkudezdfnkJqC556zDBSQrogQNGT92/c4HGPj23dbVl/RQtSNKjHSCjq+ sUe+DI6S5y9aiHJgf2vjH74CYc8uGGGUhFHnu3CvgSLi5vPyabJolTBRlPxPBAVMQEIZ cxaUwy1huPND82fY9qoaCrT0VS4WR1QIzA2QghL63Q1/CMB+ZXlvFd65oQh3Xs1uTWbc 7P9g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@163.com header.s=s110527 header.b=P3L9x7KP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=163.com Return-Path: Received: from pete.vger.email (pete.vger.email. [23.128.96.36]) by mx.google.com with ESMTPS id ij6-20020a170902ab4600b001d07f2e166csi5924220plb.261.2023.12.11.03.58.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Dec 2023 03:58:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) client-ip=23.128.96.36; Authentication-Results: mx.google.com; dkim=pass header.i=@163.com header.s=s110527 header.b=P3L9x7KP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=163.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id D4E2D80A9AB9; Mon, 11 Dec 2023 03:58:49 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234877AbjLKL6e (ORCPT + 99 others); Mon, 11 Dec 2023 06:58:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48788 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234884AbjLKL6b (ORCPT ); Mon, 11 Dec 2023 06:58:31 -0500 Received: from m15.mail.163.com (m15.mail.163.com [45.254.50.219]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id AC843CF; Mon, 11 Dec 2023 03:58:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-Id:MIME-Version; bh=zb21F grwTHHIjSU2lLqUEQQ7s329de26aUDP8GoQ+6A=; b=P3L9x7KP2EPLbuN8RwRxk fThdmeeZFiFu641TC1M0dSm0dDcVd+WGOWLlg8vE5JcH75mX+jZQlSOrjpQdehOa D8WQsBMRSSDa2+mZhLi0OKfUIQIHvnDmIAo1ZokVHBpsdBZ98WLW2t3ENdc+ECph QazmN2Ltlp39u0DpFSsdwc= Received: from ProDesk.. (unknown [58.22.7.114]) by zwqz-smtp-mta-g2-1 (Coremail) with SMTP id _____wA3l3NB+XZlin16FQ--.4568S2; Mon, 11 Dec 2023 19:57:56 +0800 (CST) From: Andy Yan To: heiko@sntech.de Cc: hjc@rock-chips.com, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org, devicetree@vger.kernel.org, sebastian.reichel@collabora.com, kever.yang@rock-chips.com, chris.obbard@collabora.com, Andy Yan Subject: [PATCH v5 05/16] drm/rockchip: vop2: Add write mask for VP config done Date: Mon, 11 Dec 2023 19:57:52 +0800 Message-Id: <20231211115752.1785013-1-andyshrk@163.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231211115547.1784587-1-andyshrk@163.com> References: <20231211115547.1784587-1-andyshrk@163.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: _____wA3l3NB+XZlin16FQ--.4568S2 X-Coremail-Antispam: 1Uf129KBjvJXoW7uw4rKw17GrW5WF13XF4fKrg_yoW8Ar1xpF WrAay5urs2kFsFgr4qkFy5Zr1aya9rAa92yr97Kw13Xas0qr1DZFn09F1jyr98JFWxZr1a ywsrAryrGF4jvrJanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jTKZXUUUUU= X-Originating-IP: [58.22.7.114] X-CM-SenderInfo: 5dqg52xkunqiywtou0bp/xtbBEghDXmVOA43AjAAAsu X-Spam-Status: No, score=0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RCVD_IN_SORBS_WEB, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Mon, 11 Dec 2023 03:58:50 -0800 (PST) From: Andy Yan The write mask bit is used to make sure when writing config done bit for one VP will not overwrite the other. Unfortunately, the write mask bit is missing on rk3566/8, that means when we write to these bits, it will not take any effect. We need this to make the vop work properly after rk3566/8 variants. Signed-off-by: Andy Yan --- (no changes since v3) Changes in v3: - split from the vop2 driver patch drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index a019cc9bbd54..25c1f33c5622 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -268,12 +268,23 @@ static bool vop2_cluster_window(const struct vop2_win *win) return win->data->feature & WIN_FEATURE_CLUSTER; } +/* + * Note: + * The write mask function is missing on rk3566/8, write + * to this bit has no effect, for the other soc(rk3588 and + * the following...), this function works well. + * + * GLB_CFG_DONE_EN doesn't have a write mask bit + * + */ static void vop2_cfg_done(struct vop2_video_port *vp) { struct vop2 *vop2 = vp->vop2; + u32 val = RK3568_REG_CFG_DONE__GLB_CFG_DONE_EN; + + val |= BIT(vp->id) | (BIT(vp->id) << 16); - regmap_set_bits(vop2->map, RK3568_REG_CFG_DONE, - BIT(vp->id) | RK3568_REG_CFG_DONE__GLB_CFG_DONE_EN); + regmap_set_bits(vop2->map, RK3568_REG_CFG_DONE, val); } static void vop2_win_disable(struct vop2_win *win) -- 2.34.1