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Message-ID: <4c033e0c-a453-4d30-814a-fda401ae82db@ti.com>
Date:   Mon, 11 Dec 2023 17:32:27 +0530
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Subject: Re: [PATCH v2 1/2] arm64: dts: ti: k3-j721e-evm: Add overlay for
 PCIE0 Endpoint Mode
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To:     Andrew Davis <afd@ti.com>
References: <20231115085204.3578616-1-s-vadapalli@ti.com>
 <20231115085204.3578616-2-s-vadapalli@ti.com>
 <c50f5dc2-8ab8-4213-a809-fcd4cd18589d@ti.com>
 <750c2b6b-8f24-4b86-996f-6f50cf46d81b@ti.com>
From:   Siddharth Vadapalli <s-vadapalli@ti.com>
In-Reply-To: <750c2b6b-8f24-4b86-996f-6f50cf46d81b@ti.com>
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On 11/12/23 16:46, Siddharth Vadapalli wrote:
> Hello Andrew,
> 
> On 05/12/23 21:43, Andrew Davis wrote:
>> On 11/15/23 2:52 AM, Siddharth Vadapalli wrote:
>>> Add overlay to enable the PCIE0 instance of PCIe on J721E-EVM in
>>> Endpoint mode of operation.
>>>
>>> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
>>> ---
>>>   arch/arm64/boot/dts/ti/Makefile               |  3 ++
>>>   .../boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso    | 53 +++++++++++++++++++
>>>   2 files changed, 56 insertions(+)
>>>   create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso
>>>
>>> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
>>> index 77a347f9f47d..5620db44d4dc 100644
>>> --- a/arch/arm64/boot/dts/ti/Makefile
>>> +++ b/arch/arm64/boot/dts/ti/Makefile
>>> @@ -66,6 +66,8 @@ dtb-$(CONFIG_ARCH_K3) += k3-j7200-evm.dtb
>>>   k3-j721e-evm-dtbs := k3-j721e-common-proc-board.dtb
>>> k3-j721e-evm-quad-port-eth-exp.dtbo
>>>   dtb-$(CONFIG_ARCH_K3) += k3-j721e-beagleboneai64.dtb
>>>   dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm.dtb
>>> +k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-evm.dtb k3-j721e-evm-pcie0-ep.dtbo
>>> +dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-pcie0-ep.dtb
>>
>> Do you really need to produce this pre-combined DTB file? If you would rather
>> just the overlay produced which could be applied at load-time (I prefer this),
>> then you should do as Jai has done[0]. Add just the overlay, and test its
>> application using a dummy target.
> 
> Thank you for pointing it out. I will implement your suggestion and post the v3
> series.

I have posted the v3 series at:
https://lore.kernel.org/r/20231211115535.1264353-1-s-vadapalli@ti.com/

> 

-- 
Regards,
Siddharth.