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Received: from VI1PR04MB4845.eurprd04.prod.outlook.com (2603:10a6:803:51::30) by AM9PR04MB7569.eurprd04.prod.outlook.com (2603:10a6:20b:2d8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7068.33; Mon, 11 Dec 2023 21:59:30 +0000 Received: from VI1PR04MB4845.eurprd04.prod.outlook.com ([fe80::dfaa:e869:45eb:76e5]) by VI1PR04MB4845.eurprd04.prod.outlook.com ([fe80::dfaa:e869:45eb:76e5%6]) with mapi id 15.20.7068.031; Mon, 11 Dec 2023 21:59:30 +0000 From: Frank Li To: frank.li@nxp.com Cc: bhelgaas@google.com, conor+dt@kernel.org, devicetree@vger.kernel.org, festevam@gmail.com, helgaas@kernel.org, hongxing.zhu@nxp.com, imx@lists.linux.dev, kernel@pengutronix.de, krzysztof.kozlowski+dt@linaro.org, kw@linux.com, l.stach@pengutronix.de, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, lpieralisi@kernel.org, manivannan.sadhasivam@linaro.org, robh@kernel.org, s.hauer@pengutronix.de, shawnguo@kernel.org Subject: [PATCH v3 02/13] PCI: imx6: Simplify phy handling by using by using IMX6_PCIE_FLAG_HAS_PHY Date: Mon, 11 Dec 2023 16:58:31 -0500 Message-Id: <20231211215842.134823-3-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231211215842.134823-1-Frank.Li@nxp.com> References: <20231211215842.134823-1-Frank.Li@nxp.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SJ0PR03CA0009.namprd03.prod.outlook.com (2603:10b6:a03:33a::14) To VI1PR04MB4845.eurprd04.prod.outlook.com (2603:10a6:803:51::30) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VI1PR04MB4845:EE_|AM9PR04MB7569:EE_ X-MS-Office365-Filtering-Correlation-Id: c68c9b6a-2b42-4cc9-eecd-08dbfa947310 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Mon, 11 Dec 2023 13:59:59 -0800 (PST) Refactors the phy handling logic in the imx6 PCI driver by adding IMX6_PCIE_FLAG_HAS_PHY bitmask define for drvdata::flags. The drvdata::flags and a bitmask ensures a cleaner and more scalable switch-case structure for handling phy. Signed-off-by: Frank Li --- Notes: Change from v1 to v3: - none drivers/pci/controller/dwc/pci-imx6.c | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 8a9b527934f80..bcf52aa86462e 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -62,6 +62,7 @@ enum imx6_pcie_variants { #define IMX6_PCIE_FLAG_SUPPORTS_SUSPEND BIT(2) #define IMX6_PCIE_FLAG_HAS_CLK_INBOUND_AXI BIT(3) #define IMX6_PCIE_FLAG_HAS_CLK_AUX BIT(4) +#define IMX6_PCIE_FLAG_HAS_PHY BIT(5) #define imx6_check_flag(pci, val) (pci->drvdata->flags & val) @@ -1327,6 +1328,13 @@ static int imx6_pcie_probe(struct platform_device *pdev) "pcie_aux clock source missing or invalid\n"); } + if (imx6_check_flag(imx6_pcie, IMX6_PCIE_FLAG_HAS_PHY)) { + imx6_pcie->phy = devm_phy_get(dev, "pcie-phy"); + if (IS_ERR(imx6_pcie->phy)) + return dev_err_probe(dev, PTR_ERR(imx6_pcie->phy), + "failed to get pcie phy\n"); + } + switch (imx6_pcie->drvdata->variant) { case IMX7D: if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR) @@ -1356,11 +1364,6 @@ static int imx6_pcie_probe(struct platform_device *pdev) return dev_err_probe(dev, PTR_ERR(imx6_pcie->apps_reset), "failed to get pcie apps reset control\n"); - imx6_pcie->phy = devm_phy_get(dev, "pcie-phy"); - if (IS_ERR(imx6_pcie->phy)) - return dev_err_probe(dev, PTR_ERR(imx6_pcie->phy), - "failed to get pcie phy\n"); - break; default: break; @@ -1500,24 +1503,28 @@ static const struct imx6_pcie_drvdata drvdata[] = { [IMX8MM] = { .variant = IMX8MM, .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND | - IMX6_PCIE_FLAG_HAS_CLK_AUX, + IMX6_PCIE_FLAG_HAS_CLK_AUX | + IMX6_PCIE_FLAG_HAS_PHY, .gpr = "fsl,imx8mm-iomuxc-gpr", }, [IMX8MP] = { .variant = IMX8MP, .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND | - IMX6_PCIE_FLAG_HAS_CLK_AUX, + IMX6_PCIE_FLAG_HAS_CLK_AUX | + IMX6_PCIE_FLAG_HAS_PHY, .gpr = "fsl,imx8mp-iomuxc-gpr", }, [IMX8MQ_EP] = { .variant = IMX8MQ_EP, - .flags = IMX6_PCIE_FLAG_HAS_CLK_AUX, + .flags = IMX6_PCIE_FLAG_HAS_CLK_AUX | + IMX6_PCIE_FLAG_HAS_PHY, .mode = DW_PCIE_EP_TYPE, .gpr = "fsl,imx8mq-iomuxc-gpr", }, [IMX8MM_EP] = { .variant = IMX8MM_EP, - .flags = IMX6_PCIE_FLAG_HAS_CLK_AUX, + .flags = IMX6_PCIE_FLAG_HAS_CLK_AUX | + IMX6_PCIE_FLAG_HAS_PHY, .mode = DW_PCIE_EP_TYPE, .gpr = "fsl,imx8mm-iomuxc-gpr", }, -- 2.34.1