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[23.128.96.31]) by mx.google.com with ESMTPS id 19-20020a170902c21300b001cfc0272b48si7280588pll.103.2023.12.12.00.24.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Dec 2023 00:24:50 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) client-ip=23.128.96.31; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="rQ/5RCGq"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id A9D558021FFC; Tue, 12 Dec 2023 00:24:47 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346128AbjLLIYX (ORCPT + 99 others); Tue, 12 Dec 2023 03:24:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346094AbjLLIWH (ORCPT ); Tue, 12 Dec 2023 03:22:07 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EF6ABDB for ; Tue, 12 Dec 2023 00:22:09 -0800 (PST) Received: by smtp.kernel.org (Postfix) with ESMTPS id E47F4C32774; Tue, 12 Dec 2023 08:22:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1702369325; bh=caawVOpxHFy9cm3i7DwECM4693fhFarzsOiGy9doXoc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=rQ/5RCGq/ykasqMp2XtDyoXiuXXnKSHGyZtV7ysaiytqZtgRDtiRqcjND2dKsCDQ1 utrI1jYleyXVngTpaRtiwcoCjZgtB/qIxxwzuDTcN5gX+rMjO2zBptPtajRCIXg7s6 81+hZ5asRJcFlErnW9ItkUO235fnqiqzoPqbzo4rAfyT7DwAY2h3lzBL+EQkMyQZ4k yXRqpHf6vVpEQq7vwXU+plDmBv3GKjFWZroV/nehvBs6vfxqGTDArRbDCwNfKUyixK 6q6GjQm7hyjg3z2+GXUwLhrbIeTP2gAkpd5J1xcwTn9T6pxgfZ37uUq3JamQWYLYor 56jKiJBekzJLw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id D32C4C4167B; Tue, 12 Dec 2023 08:22:05 +0000 (UTC) From: Nikita Shubin via B4 Relay Date: Tue, 12 Dec 2023 11:20:44 +0300 Subject: [PATCH v6 27/40] gpio: ep93xx: add DT support for gpio-ep93xx MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20231212-ep93xx-v6-27-c307b8ac9aa8@maquefel.me> References: <20231212-ep93xx-v6-0-c307b8ac9aa8@maquefel.me> In-Reply-To: <20231212-ep93xx-v6-0-c307b8ac9aa8@maquefel.me> To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Arnd Bergmann , Andy Shevchenko , Bartosz Golaszewski X-Mailer: b4 0.13-dev-e3e53 X-Developer-Signature: v=1; a=ed25519-sha256; t=1702369322; l=4650; i=nikita.shubin@maquefel.me; s=20230718; h=from:subject:message-id; bh=veUYE/VzU1y37Z5M8NkA7tAbUvE+Vs49lzqAWz+krrk=; =?utf-8?q?b=3DCs0ft9ZrLGoI?= =?utf-8?q?z/sgcMycvbE6wClqwYCs1GSpEs0A5HEnzbd5rhyEhk6tGCe3QezzMoZeC5YaSSag?= CqSNE+f4Cibv4EXZB+wwa+6z/cCmcC1czZx/3xYCxmogE6FhXGzl X-Developer-Key: i=nikita.shubin@maquefel.me; a=ed25519; pk=vqf5YIUJ7BJv3EJFaNNxWZgGuMgDH6rwufTLflwU9ac= X-Endpoint-Received: by B4 Relay for nikita.shubin@maquefel.me/20230718 with auth_id=65 X-Original-From: Nikita Shubin Reply-To: X-Spam-Status: No, score=-1.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Tue, 12 Dec 2023 00:24:47 -0800 (PST) From: Nikita Shubin Add OF ID match table. Reviewed-by: Andy Shevchenko Reviewed-by: Linus Walleij Acked-by: Bartosz Golaszewski Signed-off-by: Nikita Shubin --- drivers/gpio/gpio-ep93xx.c | 38 +++++++++++++++++++++++--------------- 1 file changed, 23 insertions(+), 15 deletions(-) diff --git a/drivers/gpio/gpio-ep93xx.c b/drivers/gpio/gpio-ep93xx.c index a55f635585f4..ab798c848215 100644 --- a/drivers/gpio/gpio-ep93xx.c +++ b/drivers/gpio/gpio-ep93xx.c @@ -12,13 +12,13 @@ #include #include #include +#include #include #include #include #include #include #include -#include struct ep93xx_gpio_irq_chip { void __iomem *base; @@ -138,7 +138,8 @@ static void ep93xx_gpio_irq_mask_ack(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc); - int port_mask = BIT(irqd_to_hwirq(d)); + irq_hw_number_t hwirq = irqd_to_hwirq(d); + int port_mask = BIT(hwirq); if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) eic->int_type2 ^= port_mask; /* switch edge direction */ @@ -147,26 +148,28 @@ static void ep93xx_gpio_irq_mask_ack(struct irq_data *d) ep93xx_gpio_update_int_params(eic); writeb(port_mask, eic->base + EP93XX_INT_EOI_OFFSET); - gpiochip_disable_irq(gc, irqd_to_hwirq(d)); + gpiochip_disable_irq(gc, hwirq); } static void ep93xx_gpio_irq_mask(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc); + irq_hw_number_t hwirq = irqd_to_hwirq(d); - eic->int_unmasked &= ~BIT(irqd_to_hwirq(d)); + eic->int_unmasked &= ~BIT(hwirq); ep93xx_gpio_update_int_params(eic); - gpiochip_disable_irq(gc, irqd_to_hwirq(d)); + gpiochip_disable_irq(gc, hwirq); } static void ep93xx_gpio_irq_unmask(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc); + irq_hw_number_t hwirq = irqd_to_hwirq(d); - gpiochip_enable_irq(gc, irqd_to_hwirq(d)); - eic->int_unmasked |= BIT(irqd_to_hwirq(d)); + gpiochip_enable_irq(gc, hwirq); + eic->int_unmasked |= BIT(hwirq); ep93xx_gpio_update_int_params(eic); } @@ -179,11 +182,11 @@ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc); - irq_hw_number_t offset = irqd_to_hwirq(d); - int port_mask = BIT(offset); + irq_hw_number_t hwirq = irqd_to_hwirq(d); + int port_mask = BIT(hwirq); irq_flow_handler_t handler; - gc->direction_input(gc, offset); + gc->direction_input(gc, hwirq); switch (type) { case IRQ_TYPE_EDGE_RISING: @@ -209,7 +212,7 @@ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type) case IRQ_TYPE_EDGE_BOTH: eic->int_type1 |= port_mask; /* set initial polarity based on current input level */ - if (gc->get(gc, offset)) + if (gc->get(gc, hwirq)) eic->int_type2 &= ~port_mask; /* falling */ else eic->int_type2 |= port_mask; /* rising */ @@ -285,9 +288,8 @@ static int ep93xx_setup_irqs(struct platform_device *pdev, if (girq->num_parents == 0) return -EINVAL; - girq->parents = devm_kcalloc(dev, girq->num_parents, - sizeof(*girq->parents), - GFP_KERNEL); + girq->parents = devm_kcalloc(dev, girq->num_parents, sizeof(*girq->parents), + GFP_KERNEL); if (!girq->parents) return -ENOMEM; @@ -306,7 +308,7 @@ static int ep93xx_setup_irqs(struct platform_device *pdev, girq->parent_handler = ep93xx_gpio_f_irq_handler; for (i = 0; i < girq->num_parents; i++) { - irq = platform_get_irq(pdev, i); + irq = platform_get_irq_optional(pdev, i); if (irq < 0) continue; @@ -359,9 +361,15 @@ static int ep93xx_gpio_probe(struct platform_device *pdev) return devm_gpiochip_add_data(&pdev->dev, gc, egc); } +static const struct of_device_id ep93xx_gpio_match[] = { + { .compatible = "cirrus,ep9301-gpio" }, + { /* sentinel */ } +}; + static struct platform_driver ep93xx_gpio_driver = { .driver = { .name = "gpio-ep93xx", + .of_match_table = ep93xx_gpio_match, }, .probe = ep93xx_gpio_probe, }; -- 2.41.0