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[23.128.96.38]) by mx.google.com with ESMTPS id o10-20020a17090ac70a00b0028a42f9d3e6si6326575pjt.168.2023.12.12.01.31.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Dec 2023 01:31:18 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) client-ip=23.128.96.38; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=arygweMM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.38 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id 5C88A8087250; Tue, 12 Dec 2023 01:31:16 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230032AbjLLJbC (ORCPT + 99 others); Tue, 12 Dec 2023 04:31:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40908 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229489AbjLLJbA (ORCPT ); Tue, 12 Dec 2023 04:31:00 -0500 Received: from madrid.collaboradmins.com (madrid.collaboradmins.com [46.235.227.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AFF9BBD; Tue, 12 Dec 2023 01:31:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1702373464; bh=Aj1SZsdyMWon6M+Vhhcwq+fa3T9vjrPvnP1Vckxo7Ug=; h=Date:Subject:To:References:From:In-Reply-To:From; b=arygweMMH6v3uzypbrzzM5Cn35/VFezVpvPO5GsUTytF+NPfqWQ+07JPOgvgbkugo A6pQ9VE+UTHB46JDlp6OT52D3XmiCu17Xv2Vik9Zk+x7z+BqvI3Tyi7rfgODmlwwkq 4m2LMvukpKAwWgMUjtwaRpfqCLrg0qKRpaEJLYCcQRoARVYznkXFn2KJQgmI1o/dXV +zlXzGJ0lp/9zi+dfADmwxuQHvZsvekVEsZQgBDK7a1iaGQuc0+eduAe4sSA5MPOuV shEXtPGuqcQC6OSiJZ4QsWxALOjWzHxRc3Azn2Xw8csR66M1BDBD35bAxMQz2VXOPX Vl4bfMZeeKhxw== Received: from [100.113.186.2] (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madrid.collaboradmins.com (Postfix) with ESMTPSA id 6B3373781423; Tue, 12 Dec 2023 09:31:03 +0000 (UTC) Message-ID: <27d8ce67-fb8b-403f-a35e-3e03a1ffd1a0@collabora.com> Date: Tue, 12 Dec 2023 10:31:02 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 4/5] clk: mediatek: add pcw_chg_bit control for PLLs of MT7988 To: Daniel Golle , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd , Matthias Brugger , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Philipp Zabel , Sabrina Dubroca , Chen-Yu Tsai , "Garmin.Chang" , Sam Shih , Frank Wunderlich , Dan Carpenter , James Liao , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, netdev@vger.kernel.org References: <152b256d253508cdc7514c0f1c5a9324bde83d46.1702350213.git.daniel@makrotopia.org> From: AngeloGioacchino Del Regno Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Tue, 12 Dec 2023 01:31:16 -0800 (PST) Il 12/12/23 04:19, Daniel Golle ha scritto: > From: Sam Shih > > Introduce pcw_chg_bit member to struct mtk_pll_data and use it instead > of the previously hardcoded PCW_CHG_MASK macro if set. > This will needed for clocks on the MT7988 SoC. > > Signed-off-by: Sam Shih > Signed-off-by: Daniel Golle Reviewed-by: AngeloGioacchino Del Regno