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Subject: [PATCH v2 2/2] x86/resctrl: Remove hard-coded memory bandwidth event
 configuration
From:   Babu Moger <babu.moger@amd.com>
To:     <corbet@lwn.net>, <fenghua.yu@intel.com>,
        <reinette.chatre@intel.com>, <tglx@linutronix.de>,
        <mingo@redhat.com>, <bp@alien8.de>, <dave.hansen@linux.intel.com>
CC:     <x86@kernel.org>, <hpa@zytor.com>, <paulmck@kernel.org>,
        <rdunlap@infradead.org>, <tj@kernel.org>, <peterz@infradead.org>,
        <seanjc@google.com>, <kim.phillips@amd.com>, <babu.moger@amd.com>,
        <jmattson@google.com>, <ilpo.jarvinen@linux.intel.com>,
        <jithu.joseph@intel.com>, <kan.liang@linux.intel.com>,
        <nikunj@amd.com>, <daniel.sneddon@linux.intel.com>,
        <pbonzini@redhat.com>, <rick.p.edgecombe@intel.com>,
        <rppt@kernel.org>, <maciej.wieczor-retman@intel.com>,
        <linux-doc@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <eranian@google.com>, <peternewman@google.com>, <dhagiani@amd.com>,
        <babu.moger@amd.com>
Date:   Tue, 12 Dec 2023 12:02:25 -0600
Message-ID: <170240414535.760665.1609957728181418569.stgit@bmoger-ubuntu>
In-Reply-To: <20231201005720.235639-1-babu.moger@amd.com>
References: <20231201005720.235639-1-babu.moger@amd.com>
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If the BMEC (Bandwidth Monitoring Event Configuration) feature is=0A=
supported, the bandwidth events can be configured. The maximum supported=0A=
bandwidth bitmask can be determined by following CPUID command.=0A=
=0A=
CPUID_Fn80000020_ECX_x03 [Platform QoS Monitoring Bandwidth Event=0A=
Configuration] Read-only. Reset: 0000_007Fh.=0A=
Bits	Description=0A=
31:7	Reserved=0A=
 6:0	Identifies the bandwidth sources that can be tracked.=0A=
=0A=
The bandwidth sources can change with the processor generations.=0A=
Currently, this information is hard-coded. Remove the hard-coded value=0A=
and detect using CPUID command. Also print the valid bitmask when the=0A=
user tries to configure invalid value.=0A=
=0A=
The CPUID details are documentation in the PPR listed below [1].=0A=
[1] Processor Programming Reference (PPR) Vol 1.1 for AMD Family 19h Model=
=0A=
11h B1 - 55901 Rev 0.25.=0A=
=0A=
Fixes: dc2a3e857981 ("x86/resctrl: Add interface to read mbm_total_bytes_co=
nfig")=0A=
Link: https://bugzilla.kernel.org/show_bug.cgi?id=3D206537=0A=
Signed-off-by: Babu Moger <babu.moger@amd.com>=0A=
=0A=
---=0A=
v2: Earlier Sent as a part of ABMC feature.=0A=
    https://lore.kernel.org/lkml/20231201005720.235639-1-babu.moger@amd.com=
/=0A=
    But this is not related to ABMC. Sending it separate now.=0A=
    Removed the global resctrl_max_evt_bitmask. Added event_mask as part of=
=0A=
    the resource.=0A=
---=0A=
 arch/x86/kernel/cpu/resctrl/internal.h |    5 ++---=0A=
 arch/x86/kernel/cpu/resctrl/monitor.c  |    6 ++++++=0A=
 arch/x86/kernel/cpu/resctrl/rdtgroup.c |   18 ++++++++++--------=0A=
 3 files changed, 18 insertions(+), 11 deletions(-)=0A=
=0A=
diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r=
esctrl/internal.h=0A=
index d2979748fae4..3e2f505614d8 100644=0A=
--- a/arch/x86/kernel/cpu/resctrl/internal.h=0A=
+++ b/arch/x86/kernel/cpu/resctrl/internal.h=0A=
@@ -50,9 +50,6 @@=0A=
 /* Dirty Victims to All Types of Memory */=0A=
 #define DIRTY_VICTIMS_TO_ALL_MEM	BIT(6)=0A=
 =0A=
-/* Max event bits supported */=0A=
-#define MAX_EVT_CONFIG_BITS		GENMASK(6, 0)=0A=
-=0A=
 struct rdt_fs_context {=0A=
 	struct kernfs_fs_context	kfc;=0A=
 	bool				enable_cdpl2;=0A=
@@ -394,6 +391,7 @@ struct rdt_parse_data {=0A=
  * @msr_update:		Function pointer to update QOS MSRs=0A=
  * @mon_scale:		cqm counter * mon_scale =3D occupancy in bytes=0A=
  * @mbm_width:		Monitor width, to detect and correct for overflow.=0A=
+ * @event_mask:		Max supported event bitmask.=0A=
  * @cdp_enabled:	CDP state of this resource=0A=
  *=0A=
  * Members of this structure are either private to the architecture=0A=
@@ -408,6 +406,7 @@ struct rdt_hw_resource {=0A=
 				 struct rdt_resource *r);=0A=
 	unsigned int		mon_scale;=0A=
 	unsigned int		mbm_width;=0A=
+	unsigned int		event_mask;=0A=
 	bool			cdp_enabled;=0A=
 };=0A=
 =0A=
diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re=
sctrl/monitor.c=0A=
index f136ac046851..30bf919edfda 100644=0A=
--- a/arch/x86/kernel/cpu/resctrl/monitor.c=0A=
+++ b/arch/x86/kernel/cpu/resctrl/monitor.c=0A=
@@ -813,6 +813,12 @@ int __init rdt_get_mon_l3_config(struct rdt_resource *=
r)=0A=
 		return ret;=0A=
 =0A=
 	if (rdt_cpu_has(X86_FEATURE_BMEC)) {=0A=
+		u32 eax, ebx, ecx, edx;=0A=
+=0A=
+		/* Detect list of bandwidth sources that can be tracked */=0A=
+		cpuid_count(0x80000020, 3, &eax, &ebx, &ecx, &edx);=0A=
+		hw_res->event_mask =3D ecx;=0A=
+=0A=
 		if (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL)) {=0A=
 			mbm_total_event.configurable =3D true;=0A=
 			mbm_config_rftype_init("mbm_total_bytes_config");=0A=
diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r=
esctrl/rdtgroup.c=0A=
index 69a1de92384a..8a1e9fdab974 100644=0A=
--- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c=0A=
+++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c=0A=
@@ -1537,17 +1537,14 @@ static void mon_event_config_read(void *info)=0A=
 {=0A=
 	struct mon_config_info *mon_info =3D info;=0A=
 	unsigned int index;=0A=
-	u64 msrval;=0A=
+	u32 h;=0A=
 =0A=
 	index =3D mon_event_config_index_get(mon_info->evtid);=0A=
 	if (index =3D=3D INVALID_CONFIG_INDEX) {=0A=
 		pr_warn_once("Invalid event id %d\n", mon_info->evtid);=0A=
 		return;=0A=
 	}=0A=
-	rdmsrl(MSR_IA32_EVT_CFG_BASE + index, msrval);=0A=
-=0A=
-	/* Report only the valid event configuration bits */=0A=
-	mon_info->mon_config =3D msrval & MAX_EVT_CONFIG_BITS;=0A=
+	rdmsr(MSR_IA32_EVT_CFG_BASE + index, mon_info->mon_config, h);=0A=
 }=0A=
 =0A=
 static void mondata_config_read(struct rdt_domain *d, struct mon_config_in=
fo *mon_info)=0A=
@@ -1557,6 +1554,7 @@ static void mondata_config_read(struct rdt_domain *d,=
 struct mon_config_info *mo=0A=
 =0A=
 static int mbm_config_show(struct seq_file *s, struct rdt_resource *r, u32=
 evtid)=0A=
 {=0A=
+	struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(r);=0A=
 	struct mon_config_info mon_info =3D {0};=0A=
 	struct rdt_domain *dom;=0A=
 	bool sep =3D false;=0A=
@@ -1571,7 +1569,9 @@ static int mbm_config_show(struct seq_file *s, struct=
 rdt_resource *r, u32 evtid=0A=
 		mon_info.evtid =3D evtid;=0A=
 		mondata_config_read(dom, &mon_info);=0A=
 =0A=
-		seq_printf(s, "%d=3D0x%02x", dom->id, mon_info.mon_config);=0A=
+		/* Report only the valid event configuration bits */=0A=
+		seq_printf(s, "%d=3D0x%02x", dom->id,=0A=
+			   mon_info.mon_config & hw_res->event_mask);=0A=
 		sep =3D true;=0A=
 	}=0A=
 	seq_puts(s, "\n");=0A=
@@ -1617,12 +1617,14 @@ static void mon_event_config_write(void *info)=0A=
 static int mbm_config_write_domain(struct rdt_resource *r,=0A=
 				   struct rdt_domain *d, u32 evtid, u32 val)=0A=
 {=0A=
+	struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(r);=0A=
 	struct mon_config_info mon_info =3D {0};=0A=
 	int ret =3D 0;=0A=
 =0A=
 	/* mon_config cannot be more than the supported set of events */=0A=
-	if (val > MAX_EVT_CONFIG_BITS) {=0A=
-		rdt_last_cmd_puts("Invalid event configuration\n");=0A=
+	if ((val & hw_res->event_mask) !=3D val) {=0A=
+		rdt_last_cmd_printf("Invalid input: The maximum valid bitmask is 0x%02x\=
n",=0A=
+				    hw_res->event_mask);=0A=
 		return -EINVAL;=0A=
 	}=0A=
 =0A=
=0A=