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Message-ID: <e09e4df8-ec36-4953-9bb0-75a3ce0b535d@linaro.org>
Date:   Wed, 13 Dec 2023 07:48:49 +0100
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Subject: Re: [PATCH v2 1/5] dt-bindings: phy: cadence-torrent: Add optional
 input reference clock for PLL1
Content-Language: en-US
To:     Swapnil Jakhade <sjakhade@cadence.com>, vkoul@kernel.org,
        kishon@kernel.org, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
        linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org
Cc:     mparab@cadence.com, rogerq@kernel.org, s-vadapalli@ti.com
References: <20231212114840.1468903-1-sjakhade@cadence.com>
 <20231212114840.1468903-2-sjakhade@cadence.com>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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In-Reply-To: <20231212114840.1468903-2-sjakhade@cadence.com>
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Precedence: bulk

On 12/12/2023 12:48, Swapnil Jakhade wrote:
> Torrent PHY can have two input reference clocks. Update bindings

It already supports two.

> to support dual reference clock multilink configurations.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
> ---
>  .../devicetree/bindings/phy/phy-cadence-torrent.yaml        | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
> index dfb31314face..98946f549895 100644
> --- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
> @@ -35,14 +35,14 @@ properties:
>      minItems: 1
>      maxItems: 2
>      description:
> -      PHY reference clock for 1 item. Must contain an entry in clock-names.
> -      Optional Parent to enable output reference clock.
> +      PHY input reference clocks - refclk & pll1_refclk (optional).
> +      Optional Parent to enable output reference clock (phy_en_refclk).

So third clock? But you allow only two? Confusing.

>  
>    clock-names:
>      minItems: 1
>      items:
>        - const: refclk
> -      - const: phy_en_refclk
> +      - enum: [ pll1_refclk, phy_en_refclk ]

This does not match your commit msg. You already had two clocks there.

Best regards,
Krzysztof