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[209.85.128.180]) by smtp.gmail.com with ESMTPSA id z6-20020a81c206000000b005ce93212c47sm4406588ywc.134.2023.12.13.00.36.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 13 Dec 2023 00:36:27 -0800 (PST) Received: by mail-yw1-f180.google.com with SMTP id 00721157ae682-5e2ce5c8f04so547547b3.2; Wed, 13 Dec 2023 00:36:27 -0800 (PST) X-Received: by 2002:a81:a1ce:0:b0:5e2:2917:273d with SMTP id y197-20020a81a1ce000000b005e22917273dmr1045743ywg.43.1702456586772; Wed, 13 Dec 2023 00:36:26 -0800 (PST) MIME-Version: 1.0 References: <20231212213457.132605-1-alexghiti@rivosinc.com> <20231212213457.132605-2-alexghiti@rivosinc.com> In-Reply-To: <20231212213457.132605-2-alexghiti@rivosinc.com> From: Geert Uytterhoeven Date: Wed, 13 Dec 2023 09:36:15 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 1/2] mm: Introduce flush_cache_vmap_early() To: Alexandre Ghiti Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrey Ryabinin , Alexander Potapenko , Andrey Konovalov , Dmitry Vyukov , Vincenzo Frascino , Arnd Bergmann , Dennis Zhou , Tejun Heo , Christoph Lameter , Andrew Morton , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, linux-arch@vger.kernel.org, linux-mm@kvack.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Wed, 13 Dec 2023 00:36:40 -0800 (PST) On Tue, Dec 12, 2023 at 10:36 PM Alexandre Ghiti wrote: > The pcpu setup when using the page allocator sets up a new vmalloc > mapping very early in the boot process, so early that it cannot use the > flush_cache_vmap() function which may depend on structures not yet > initialized (for example in riscv, we currently send an IPI to flush > other cpus TLB). > > But on some architectures, we must call flush_cache_vmap(): for example, > in riscv, some uarchs can cache invalid TLB entries so we need to flush > the new established mapping to avoid taking an exception. > > So fix this by introducing a new function flush_cache_vmap_early() which > is called right after setting the new page table entry and before > accessing this new mapping. This new function implements a local flush > tlb on riscv and is no-op for other architectures (same as today). > > Signed-off-by: Alexandre Ghiti > arch/m68k/include/asm/cacheflush_mm.h | 1 + Acked-by: Geert Uytterhoeven Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds